40mΩ / 1700V DioMOS (Diode in SiC MOSFET) for High Power Switching Applications

Abstract

Device technologies of SiC MOSFETs have nearly matured to the level of mass production and one of the remaining tasks is to serve better solutions in view of both costs and performances for practical systems. Elimination of external reverse diodes in inverter circuits is one of the solutions, by which total area of the SiC chips is greatly reduced leading to lower material cost. A DioMOS (Diode in SiC MOSFET) successfully integrates the reverse diode without any increase of the chip size from the original MOS transistor by utilizing an n-type epitaxial channel under the MOS gate for the reverse conduction path of the diode. The basic concept of the DioMOS has been proposed [1]; meanwhile, further reduction of the on-state resistance together with confirmation of high-speed switching is necessary for its application in power switching systems. In this paper, low on-state resistance (Ron) of 40mΩ and blocking voltage (BVds) of 1700V as well as improved switching performances of DioMOS are demonstrated. The measured results suggest DioMOS to be satisfactory for practical use.

Reliability issues in GaN and SiC power devices

“…A Diode-integrated MOS (DioMOS) structure has been proposed to reduce the total chip cost in the SiC-based switching system [17,18]. Figure 13 shows the schematic cross section in which additional channel epitaxial layer is formed under the gate insulator.…”

SiC DioMOS with precisely controlled epitaxial channel

“…N 2 gas is used for n -type doping. Typical substrates used for epitaxial growth include the 4H-SiC(0001) Si-face off-oriented wafers that are inclined four degrees toward the [11][12][13][14][15][16][17][18][19][20] direction. The off-oriented substrates ensure that the step-fl ow growth of 4H-SiC proceeds at each step edge without any other polytype (3C, 6H) formation on the (0001) terraces.…”

Hard and soft switching losses of a SiC MOSFET module under realistic topology and loading conditions

“…2 a) shows the circuit symbols for DioMOS versus standard SiC MOSFET and Fig. 2 b) illustrates the device cross-section of SiC DioMOS [15]. Compared to the standard vertical power MOSFET, the device structure is mostly similar in DioMOS, the only difference is that the latter consists of an ultrathin and highly doped n -type epitaxial layer and highly doped p + -body region.…”

“…There are three number of chips in FCA150XB120 and six number of chips in CAS120M12BM2. It should be noted that the former has higher V gsth compared to the latter and was realized by making larger SiC depletion capacitance [15]. This is preferable from an application point of view because higher V gsth provides large noise margin enabling stable switching operation.…”

“…Later this device was improved to meet more practical standards for high power switching devices, such as high threshold voltage (V gsth ), low on-state resistance (R dson ), and low forward voltage drop (V FO ) of the channel diode [15]. Table I shows the major differences between the selected SiC module and the standard SiC module (CAS120M12BM2) taken from the manufacturer datasheet [3,5].…”