400-GHz InP/GaAsSb DHBTs With Low-Noise Microwave Performance

Abstract

We report self-aligned 0.3-µm emitter InP/GaAsSb/ InP DHBTs featuring a common-emitter current gain of 46 and cutoff frequencies f T = 400 GHz and f MAX = 322 GHz for devices implemented with a 20-nm C-doped base and a 75-nm InP collector. Our DHBTs display attractive noise properties with a minimum noise figure NF min = 1.2 dB at 20 GHz, which is nearly independent of frequency over the 2-20-GHz measurement band. This represents an improvement of at least 2.3 dB with respect to previously published results for GaAsSb-based devices, due to process improvements that allow good RF characteristics to be maintained at the low current levels required for low noise operation. Analysis shows that the low-frequency NF min is limited by the relatively low current gain values typical of III-V HBTs. InP/GaAsSb DHBTs could be attractive low-noise devices for higher frequencies.Index Terms-Double heterojunction bipolar transistors (DHBTs), InP/GaAsSb, millimeter-wave transistors, minimum noise figure.

GaN/InGaN heterojunction bipolar transistors with ultra‐high d.c. power density (>3 MW/cm2)

“…The power switching figure of merit (BV CEO × J C ) is 16.5 MW/cm 2 . This value also represents greater than 10 times of those achieved on pnp AlGaN/GaN HBTs grown on FS GaN substrates 19 and more than 1.5 times higher than any state‐of‐the‐art HBTs 14–16.…”

RF characterization of InP double heterojunction bipolar transistors on a flexible substrate under bending conditions

“…The RF performance of flexible substrate InP DHBTs are measured by vector network analyzer, which using off-wafer line-line-reflect-match calibration, at the same time, the device pads are de-embedded with open/short calibration structures [20][21][22][23] . Fig.…”

Parameterization of the dielectric function of InP from 1.19 to 6.57 eV for temperatures from 25 to 700 K

“…Many papers present developments and applications of InP/GaAsSb/InP-based DHBTs. 2,21 As a representative application, we simulate the growth of a 100 nm thick InP layer on a 100 nm thick GaAs film on an InP substrate. We assume an intermediate layer of GaAs instead of GaAsSb because high-temperature e data are not available for GaAsSb.…”