4-terminal relay technology for complementary logic

Nathanael, Rhesa; Pott, V.; Kam, Hei; Jeon, Jong-June; Liu, Tsu‐Jae King

doi:10.1109/iedm.2009.5424383

Cited by 115 publications

(96 citation statements)

References 7 publications

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“…In terms of device structure and operation, a MEM relay designed for digital logic applications [10] is very similar to relays designed for radio-frequency (RF) signal switching applications [12]- [15]. However, the contact resistance (R on ) for a logic relay can be as high as 10 kΩ (for a load capacitance of 10-100 fF) because the switching delay of a relay-based circuit is dominated by the mechanical pull-in time (t pi , typically 10-100 ns) rather than the electrical charging/discharging delay (t RC ) [8], [11].…”

Section: Introductionmentioning

confidence: 99%

Design, Optimization, and Scaling of MEM Relays for Ultra-Low-Power Digital Logic

Kam

Liu

Stojanović

et al. 2011

IEEE Trans. Electron Devices

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Abstract-Microelectromechanical relays have recently been proposed for ultra-low-power digital logic because their nearly ideal switching behavior can potentially enable reductions in supply voltage (V dd ) and, hence, energy per operation beyond the limits of MOSFETs. Using a calibrated analytical model, a sensitivity-based energy-delay optimization approach is developed in order to establish simple relay design guidelines. It is found that, at the optimal design point, every 2× energy increase can be traded off for a ∼1.5× reduction in relay delay. A contact-gap-toactuation-gap thickness ratio of 0.7-0.8 is shown to result in the most energy-efficient relay operation, implying that pull-in operation is preferred for an energy-efficient relay design. Based on the analytical model and design guidelines, a scaling theory for relays is presented. A scaled relay technology is projected to provide > 10× energy savings over an equivalent MOSFET technology, for circuits operating at clock frequencies up to ∼100 MHz.Index Terms-Digital integrated circuits, logic devices, low power circuit, microelectromechanical systems, microswitches, subthreshold slope, 60 mV/dec.

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Section: Introductionmentioning

confidence: 99%

Design, Optimization, and Scaling of MEM Relays for Ultra-Low-Power Digital Logic

Kam

Liu

Stojanović

et al. 2011

IEEE Trans. Electron Devices

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“…The contacting electrode material initially was tungsten (W) and later changed to ruthenium (Ru) and other materials for improved Rc stability [47,48]. Although the in-plane dimensions of this relay are in the micrometer range, the as-fabricated contact gap thickness (gd) is in the nanoscale range [44]. Operating (gate voltage) lower than 1 V has been enabled by applying a body bias voltage [48] with a turn-on delay below 1 µs.…”

Section: Other Relays Fabricated Using Cmos-compatible Processesmentioning

confidence: 99%

“…The logic relay developed at UC Berkeley is comprised of a movable body electrode formed in a layer of polycrystalline silicon-germanium to which a conductive strip of metal (the "channel") is attached via an insulating layer of aluminum-oxide ( Figure 7) [44][45][46]. Two variations of this insulated-body relay design, 4T and 6T, have been reported.…”

Section: Other Relays Fabricated Using Cmos-compatible Processesmentioning

confidence: 99%

Nanoelectromechanical Switches for Low-Power Digital Computing

Peschot¹,

Qian²,

Liu³

2015

Micromachines

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Abstract:The need for more energy-efficient solid-state switches beyond complementary metal-oxide-semiconductor (CMOS) transistors has become a major concern as the power consumption of electronic integrated circuits (ICs) steadily increases with technology scaling. Nano-Electro-Mechanical (NEM) relays control current flow by nanometer-scale motion to make or break physical contact between electrodes, and offer advantages over transistors for low-power digital logic applications: virtually zero leakage current for negligible static power consumption; the ability to operate with very small voltage signals for low dynamic power consumption; and robustness against harsh environments such as extreme temperatures. Therefore, NEM logic switches (relays) have been investigated by several research groups during the past decade. Circuit simulations calibrated to experimental data indicate that scaled relay technology can overcome the energy-efficiency limit of CMOS technology. This paper reviews recent progress toward this goal, providing an overview of the different relay designs and experimental results achieved by various research groups, as well as of relay-based IC design principles. Remaining challenges for realizing the promise of nano-mechanical computing, and ongoing efforts to address these, are discussed.

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“…NEM relays are composed of 4 terminals like MOSFET devices. However, in NEM relays, the mechanical channel is actuated by electrostatic force, instead of the electrical channel [2][3][4][5][6]. When the channel is turned off in NEM relays, it is disconnected mechanically from the both source and drain.…”

Section: Introductionmentioning

confidence: 99%

Process-Variation-Adaptive Charge Pump Circuit using NEM (Nano-Electro-Mechanical) Relays for Low Power Consumption and High Power Efficiency

Byeon¹,

Shin²,

Song³

et al. 2015

JSTS:Journal of Semiconductor Technology and Science

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Abstract-For some low-frequency applications such as power-related circuits, NEM relays have been known to show better performance than MOSFETs. For example, in a step-down charge pump circuit, the NEM relays showed much smaller layout area and better energy efficiency than MOSFETs. However, severe process variations of NEM relays hinder them from being widely used in various low-frequency applications. To mitigate the process-variation problems of NEM relays, in this paper, a new NEMrelay charge pump circuit with the self-adjustment is proposed. By self-adjusting a pulse amplitude voltage according to process variations, the power consumption can be saved by 4.6%, compared to the conventional scheme without the self-adjustment. This power saving can also be helpful in improving the power efficiency of the proposed scheme. From the circuit simulation of NEM-relay charge pump circuit, the efficiency of the proposed scheme is improved better by 4.1% than the conventional.

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4-terminal relay technology for complementary logic

Cited by 115 publications

References 7 publications

Design, Optimization, and Scaling of MEM Relays for Ultra-Low-Power Digital Logic

Design, Optimization, and Scaling of MEM Relays for Ultra-Low-Power Digital Logic

Nanoelectromechanical Switches for Low-Power Digital Computing

Process-Variation-Adaptive Charge Pump Circuit using NEM (Nano-Electro-Mechanical) Relays for Low Power Consumption and High Power Efficiency

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