3D Finite Element Monte Carlo Simulations of Multigate Nanoscale Transistors

Aldegunde, Manuel; García‐Loureiro, Antonio J.; Kálna, K.

doi:10.1109/ted.2013.2253465

Cited by 44 publications

(59 citation statements)

References 28 publications

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“…These devices have been designed following the 2013 ITRS targets for high-performance logic multi-gate devices [9] assuming a n-type Gaussian-like doping profile in the source/drain regions (with a N SD peak value) and a p-type uniform doping in the channel (N ch ) [10]. The geometry of the simulated devices is shown in Fig.…”

Section: Finfet Modellingmentioning

confidence: 99%

“…In the MC simulator, the quantum corrections have been included via the solution of the DG equation for the In 0.53 Ga 0.47 As device [10], and of the 2-D Schrödinger equation for the Si device [17], respectively. The MC simulation tool uses an analytic non-parabolic anisotropic model [18] and includes the interface roughness via Ando's model [19].…”

Section: Finfet Modellingmentioning

confidence: 99%

“…The MC simulation tool uses an analytic non-parabolic anisotropic model [18] and includes the interface roughness via Ando's model [19]. Note that the 3-D quantum-corrected FE Monte Carlo simulations were verified against experimental I D -V G characteristics of a 25 nm gate Si FinFET [10]. The MC considers the following scattering mechanisms: acoustic phonon, non-polar optical intra-valley, non-polar optical inter-valley and ionized impurities (using Ridley's third-body exclusion we have used the same constant current criterion for both devices (I T = 17.56 A/m).…”

Section: Finfet Modellingmentioning

confidence: 99%

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Comparison of Fin-Edge Roughness and Metal Grain Work Function Variability in InGaAs and Si FinFETs

Seoane

Indalecio

Aldegunde

et al. 2016

IEEE Trans. Electron Devices

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Copies of full items can be used for personal research or study, educational, or not-for profit purposes without prior permission or charge. Provided that the authors, title and full bibliographic details are credited, a hyperlink and/or URL is given for the original metadata page and the content is not changed in any way.Publisher's statement: "© 2016 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting /republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works." A note on versions:The version presented here may differ from the published version or, version of record, if you wish to cite this item you are advised to consult the publisher's version. Please see the 'permanent WRAP url' above for details on accessing the published version and note that access may require a subscription. Abstract-The fin edge roughness (FER) and the TiN metal grain work-function (MGW) induced variability affecting off and on device characteristics is studied and compared between a 10.4 nm gate length In 0.53 Ga 0.47 As FinFET and a 10.7 nm gate length Si FinFET. We have analysed the impact of variability by assessing five figures of merit (V T , SS, I OFF , DIBL and I ON ) using two state-of-the-art in-house-build 3-D simulation tools based on the finite element method. Quantum-corrected 3-D drift-diffusion simulations are employed for variability studies in the sub-threshold region while, in the on-region, we use quantum-corrected 3-D ensemble Monte Carlo simulations. The In 0.53 Ga 0.47 As FinFET is more resilient to the FER and MGW variability in the sub-threshold compared to the Si FinFET due to a stronger quantum carrier confinement present in the In 0.53 Ga 0.47 As channel. However, the on-current variability is between 1.1-2.2 times larger for the In 0.53 Ga 0.47 As FinFET than for the Si counterpart, respectively.

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Section: Finfet Modellingmentioning

confidence: 99%

Section: Finfet Modellingmentioning

confidence: 99%

Section: Finfet Modellingmentioning

confidence: 99%

See 1 more Smart Citation

Comparison of Fin-Edge Roughness and Metal Grain Work Function Variability in InGaAs and Si FinFETs

Seoane

Indalecio

Aldegunde

et al. 2016

IEEE Trans. Electron Devices

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“…See Figure 2 for the author's approach to simulation. As will be clear to the reader, the quantum-corrected MC simulations, which valuably reflect the non-equilibrium transport effects [17,[19][20][21][22], generate predictive simulation results. After conducting the DD simulations and, in turn, calibrating these in view of the MC results, the former can be used to reflect the contact resistance impacts [4].…”

Section: Methodsmentioning

confidence: 99%

Correlation between the Golden Ratio and Nanowire Transistor Performance

Al-Ameri

2018

Applied Sciences

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An observation was made in this research regarding the fact that the signatures of isotropic charge distributions in silicon nanowire transistors (NWT) displayed identical characteristics to the golden ratio (Phi). In turn, a simulation was conducted regarding ultra-scaled n-type Si (NWT) with respect to the 5-nm complementary metal-oxide-semiconductor (CMOS) application. The results reveal that the amount of mobile charge in the channel and intrinsic speed of the device are determined by the device geometry and could also be correlated to the golden ratio (Phi). This paper highlights the issue that the optimization of NWT geometry could reduce the impact of the main sources of statistical variability on the Figure of Merit (FoM) of devices. In the context of industrial early successes in fabricating vertically stacked NWT, ensemble Monte Carlo (MC) simulations with quantum correction are used to accurately predict the drive current. This occurs alongside a consideration of the degree to which the carrier transport in the vertically stacked lateral NWTs are complex.

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“…As semiconductor devices are shrunk into deep nanoscale dimensions in order to boost their performance, the carrier transport becomes highly non-equilibrium requiring advanced physically based simulation models. The self-consistent ensemble MC is one of such methods, providing a detailed insight into transport and an accurate prediction of current characteristics of nanoscale transistors [4,5].…”

Section: Introductionmentioning

confidence: 99%