2015 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) 2015
DOI: 10.1109/sispad.2015.7292271
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3D electro-thermal simulations of bulk FinFETs with statistical variations

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Cited by 4 publications
(5 citation statements)
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“…We have presented a progressive study of coupled electro-thermal simulation for both SOI FinFET and bulk FinFET, investigating the impact of lattice temperature gradient on the Id-Vg characteristic of the uniform devices [6]. In this paper, we further investigate the 3D coupled electro-thermal simulation for FinFET with statistical variations.…”
Section: Simulation Results For a Soi Finfet Examplementioning
confidence: 99%
See 1 more Smart Citation
“…We have presented a progressive study of coupled electro-thermal simulation for both SOI FinFET and bulk FinFET, investigating the impact of lattice temperature gradient on the Id-Vg characteristic of the uniform devices [6]. In this paper, we further investigate the 3D coupled electro-thermal simulation for FinFET with statistical variations.…”
Section: Simulation Results For a Soi Finfet Examplementioning
confidence: 99%
“…Recently we have developed a thermal simulation module, implemented in GARAND, and studied the lattice temperature profile and device performance on a SOI FinFET and a bulk FinFET example [6]. As a further step, in this paper, we investigate the 3D coupled electro-thermal simulation for FinFET with statistical variations.…”
Section: Introductionmentioning
confidence: 99%
“…We select the FinFET as a representative example of transistors and employed GiftBTE to predict its temperature distribution. The structure and boundary conditions of the FinFET are illustrated in figure 6(a), which are adapted from a previous study [72]. The thermalizing boundary, in contact with the metal electrode (source and drain) or away from the hot spot (substrate) [10,73], is set at 300 K to simulate a room temperature environment [74].…”
Section: Temperature Rise Of Finfetmentioning
confidence: 99%
“…The thermalizing boundary, in contact with the metal electrode (source and drain) or away from the hot spot (substrate) [10,73], is set at 300 K to simulate a room temperature environment [74]. The diffusely reflecting boundary is set at the boundary in contact with the dielectric layer [72]. The other boundaries are set as specularly reflecting boundaries to mimic the symmetric boundary between devices [54,55].…”
Section: Temperature Rise Of Finfetmentioning
confidence: 99%
“…Recently, the thermal simulation module in the GSS 'atomistic' simulator GARAND [6] has been enhanced to capture accurately the fin geometry dependence of the thermal conductivity [7][8]. In this paper, GARAND is used to investigate the electro-thermal performance of SOI FinFETs under different external thermal resistances connected to the gate.…”
Section: Introductionmentioning
confidence: 99%