30GHz Operation of Single-Flux-Quantum Arithmetic Logic Unit Implemented by Using Dynamically Reconfigurable Gates

Abstract

A single-flux-quantum (SFQ) arithmetic logic unit (ALU) was designed and tested to evaluate the effectiveness of introducing dynamically reconfigurable logic gates in the design of a superconducting logic circuit. We designed and tested a bit-serial SFQ ALU that can perform six arithmetic/logic functions by using a dynamically reconfigurable AND/OR gate. To ensure stable operation of the ALU, we improved the operating margin of the SFQ AND/OR gate by employing a partially shielded structure where the circuit is partially surrounded by under-and over-ground layers to reduce parasitic inductances. Owing to the introduction of the partially shielded structure, the operating margin of the dynamically reconfigurable AND/OR gate can be improved without increasing the circuit area. This ALU can be designed with a smaller circuit area compared with the conventional ALU by using the dynamically reconfigurable AND/OR gate. We implemented the SFQ ALU using the AIST 2.5 kA/cm 2 Nb standard process 2. We confirmed high-speed operation and correct reconfiguration of the SFQ ALU by a high-speed test. The measured maximum operation frequency was 30 GHz. key words: SFQ circuit, shielding, arithmetic logic unit, reconfigurable logic device

A binary neural computing unit with programmable gate using SFQ and CMOS hybrid circuit

“…Additionally, the requirement for two inputs in XOR gates complicates the timing calibration process for largescale SFQ circuits. Some dynamically reconfigurable SFQ logic gates have been proposed to solve this problem [15][16][17]. However, these logic gates require the SFQ-pulse as a control signal, thus increasing the SFQ line width and making it difficult to be controlled by CMOS circuits.…”