Wafer-scale very large memory windows in graphene monolayer/HfZrO ferroelectric capacitors

Abstract

We have fabricated and electrically characterized at the wafer scale tens of metal-ferroelectric (HfZrO)-semiconductor capacitors and metal-graphene monolayer-ferroelectric (HfZrO)-semiconductor capacitors with the same top electrode dimensions. We have found that the memory windows of the capacitors containing graphene are 3-4 times larger than the ferroelectric capacitors without graphene, and increase even more after annealing. This physical effect can be attributed to the additional electric field exerted by the graphene monolayer on the HfZrO ferroelectric semiconductor capacitor, and to the negative thermal extension coefficient of graphene, respectively.

2D Materials Nanoelectronics: New Concepts, Fabrication, Characterization From Microwaves up to Optical Spectrum

“…Very recently, we have designed and fabricated HfZrO memories based on the graphene monolayer/ferroelectric (HfZrO)/semiconductor/metal configuration depicted in Figure . The memory windows of graphene‐based HfZrO memories are 3–4 times larger than those of ferroelectric memories without graphene; the ratio is increasing after annealing.…”

“…The memory window for MFS and GMFS (left axis) and the enhancement factor R (right axis). Reproduced with permission . Copyright 2018, Institute of Physics, UK.…”

Low-Voltage Permittivity Control of Coplanar Lines Based on Hafnium Oxide Ferroelectrics Grown on Silicon

“…Therefore, for the purpose of this work we performed a batch fabrication of HfZrO with a thickness of 6 nm on HRSi (Float-Zone Hyper Pure Silicon (FZ-HPS) P(100) by Topsil, resistivity ρ > 10, 000 •cm), with thickness of 525 µm using ALD growth methods and we used a series of characterization techniques to assign ferroelectricity to HfZrO. The details of fabrication and characterization (using PFM, XRD and XPS) are presented in [10] and in the Appendix. It is worth mentioning here two main aspects: (i) prior to the ALD process, the silicon wafer was subjected to surface treatment by exposure to UV-ozone for 15 min.…”

“…The interest in the development of HfO 2 -based ferroelectrics and devices based on them is also illustrated by the fact that several reviews about HfO 2 -based ferroelectrics have been recently published [7]- [9]. The applications of these amazing discoveries related to material science are fructified by the applications of new ferroelectrics based on doped HfO 2 in memories [9], [10], low-power transistors [11]- [13], and harvesting of electromagnetic (EM) energy based on HfZrO tunneling junctions [14]. Ferroelectrics were considered in the past the most promising materials for high-frequency tunable circuits, but this path was abandoned due to the high DC voltages required to tune the microwave circuits (i.e.…”

Designing Multi‐Level Resistance States in Graphene Ferroelectric Transistors

“…[2][3][4][5][6][7][8][9][10] The binary states, "0" and "1," are programmed by switching from one polarization state to the another by applying a bias that exceeds the coercive bias, V C , of the ferroelectric gate. [20][21][22][23] Graphene has been the workhorse of the 2D material family. Demonstration of wafer-level upscaling of graphene Fe-FETs, [13][14][15][16][17][18][19] on flexible foils, [23][24][25][26][27] and even fully solution-processed graphene Fe-FETs [19] has supported the proposed application of 2D materials for high-speed nonvolatile memories.…”