Designing Multi‐Level Resistance States in Graphene Ferroelectric Transistors

Abstract

Conventional memory elements code information in the Boolean "0" and "1" form. Devices that exceed bistability in their resistance are useful as memory for future data storage due to their enhanced memory capacity, and are also a necessity for contemporary applications such as neuromorphic computing.Here, with the aid of an experimentally validated device model, design rules are outlined and more than two stable resistance states in a graphene ferroelectric field-effect transistor are experimentally demonstrated. The design methodology can be extrapolated for on-demand introduction of multiple resistance states in ferroelectric transistors for applications both in data storage and neuromorphic computing.

Flexible Graphene-Channel Memory Devices: A Review

“…Therefore, strategic adoption of a nanostructured and/or hybridized channel with a controllable doping level might be recommended for building Fe-GFET memories with an improved ON/OFF ratio. Also, novel fabrication concepts such as advanced patterning, electrochemical exfoliation, metadevice implementation, and multistate data memories have recently been suggested, which might also be applicable to flexible devices. − It is also important to carefully understand fundamental stress and degradation mechanisms in ferroelectric materials, − in order to minimize these effects for long-term-stable memory technologies. Although organic ferroelectric layers (e.g., PVDF-TrFE) have mainly been employed for flexible applications, inorganic ferroelectric materials such as PZT are also broadly investigated because of their excellent structural tunability and physical properties .…”

Rationally Designing High‐Performance Versatile Organic Memristors through Molecule‐Mediated Ion Movements

“…Versatile memory devices have become one of the most potential alternatives for next-generation information processing and computing elements, such as devices with distinct resistive switching (RS) for data storage, [1][2][3][4][5] gradual conductive updates for synaptic simulations, [6][7][8][9] and threshold switching (TS) for neuron-firing simulation. [10,11] As one of the most effective mechanism attracting massive attentions in memory device, the reversible combination between ions and surrounding matrix inside the active layer enables the ions migration and make these devices stand out.…”

Large–Area Graphene Electrode for Ferroelectric Control of Pb(Mg1/3Nb2/3)O3–PbTiO3 Single Crystal

“…[8] In particular, as a prototypical example of an atomically thin two-dimensionally structured material, monolayer graphene has been incorporated with ferroelectric polymers or ferroelectric oxides to examine the controllability of the carrier density in graphene by the neighboring ferroelectrics. [13][14][15][16][17][18][19][20] Even though there is no bandgap in graphene, its Dirac-cone 1a. b) A schematic drawing of the devices in (a), including elements such as align marks, graphene areas, and interdigitated pattern electrodes.…”

“…[24][25][26][27][28] Specifically, when graphene contacts a ferroelectric polymer like poly(vinylidene fluoride-trifluoroethylene), its conductance is strongly influenced by the polymer's polarization. [13][14][15][16][17]22,27] However, when in contact with a ferroelectric oxide such as Pb(Zr,Ti)O 3 , graphene's conductance wasn't notably controlled by the oxide's ferroelectricity. This suggests that surface charges were compensated by other factors, such as polar molecules or trapped charges at the interface rather than charge carriers in graphene.…”