3-Gb/s High-Speed True Random Number Generator Using Common-Mode Operating Comparator and Sampling Uncertainty of D Flip-Flop

Bae, Sang-Geun; Kim, Yongtae; Park, Yunsoo; Kim, Chulwoo

doi:10.1109/jssc.2016.2625341

Cited by 44 publications

(27 citation statements)

References 10 publications

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“…These applications are usually extremely limited in their power, cost and area budgets that demands high efficiency. Due to the lack of efficient sources of randomness, pseudo-random number generators (PRNG) have been used in different applications and have been frequently reported to be predictable, and hence, vulnerable to a range of attacks [3,4].…”

Section: Introductionmentioning

confidence: 99%

“…There are numerous spatiotemporal phenomena in hardware, specially at deep-micron or nanometer scales, that have been used as sources of randomness, and chaotic systems [3][4][5][6]. In CMOS, randomness and jitter in oscillators output [2,7], jitter in digital systems [8,9], metastability in common mode comparators as well as well-known sampling uncertainty of D flip-flops [4], metastability in latch circuits [10], themal noise [1], and edge racing in even-stage inverter rings [3] are just a couple of examples. Oscillator-based and metastable TRNGs have the simplest and largest circuits, receptively with oscillator-based TRNGs suffering from reported poor randomness [11].…”

Section: Introductionmentioning

confidence: 99%

“…Oscillator-based and metastable TRNGs have the simplest and largest circuits, receptively with oscillator-based TRNGs suffering from reported poor randomness [11]. Entropy sources like thermal noise in filedeffect transistors (FETs) is strong function of temperature and its noise power is relatively weak, therefore, not only harvesting the noise takes considerable efforts but extensive considerations are required to ensure minimum correlation in the output [4].…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Nano-Intrinsic True Random Number Generation: A Device to Data Study

Kim

Nili

Truong

et al. 2019

IEEE Trans. Circuits Syst. I

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Recent advances in predictive data analytics and ever growing digitalization and connectivity with explosive expansions in industrial and consumer Internet-of-Things (IoT) has raised significant concerns about security of people's identities and data. It has created close to ideal environment for adversaries in terms of the amount of data that could be used for modeling and also greater accessibility for side-channel analysis of security primitives and random number generators. Random number generators (RNGs) are at the core of most security applications. Therefore, a secure and trustworthy source of randomness is required to be found. Here, we present a differential circuit for harvesting one of the most stochastic phenomenon in solidstate physics, random telegraphic noise (RTN), that is designed to demonstrate significantly lower sensitivities to other sources of noises, radiation and temperature fluctuations. We use RTN in amorphous SrTiO3-based resistive memories to evaluate the proposed true random number generator (TRNG). Successful evaluation on conventional true randomness tests (NIST tests) has been shown. Robustness against using predictive machine learning and side-channel attacks have also been demonstrated in comparison with non-differential readouts methods.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Nano-Intrinsic True Random Number Generation: A Device to Data Study

Kim

Nili

Truong

et al. 2019

IEEE Trans. Circuits Syst. I

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“…Although the design in [47] consumes less power, the data rate is limited at ''KHz''. Besides, we compare our work with previous generators using physical noises [17], [48]. The work in [17], which uses metastability and jitter noise to generate random bits, has the highest throughput.…”

Section: Randomness Evaluationmentioning

confidence: 99%

“…Besides, we compare our work with previous generators using physical noises [17], [48]. The work in [17], which uses metastability and jitter noise to generate random bits, has the highest throughput. However, it consumes much more power than our design.…”

Section: Randomness Evaluationmentioning

confidence: 99%

A Low Power Circuit Design for Chaos-Key Based Data Encryption

et al. 2020

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Dynamic and non-linear systems have been used to generate random bits in high-security applications for decades. In this perspective, due to their stochastic characteristic, chaotic systems have been emerging as the natural choice for the generation of random bits. This paper presents the design and the implementation of a chaos-based true random number generator and a chaos-key based data encryption scheme for secure communications. The mathematical expression of the dynamic system is presented and analyzed to evaluate the possibility of chaos occurrence. Then, the chaotic system is realized at the circuit level using 130 nm CMOS technology to generate random bit sequences, which are utilized in data encryption. Chaotic signal outputs of the chaos-based random number generator circuit are sampled at a maximum frequency of 50 MHz, enabling a high throughput of random bits. The core of the chaotic circuit consumes 630µW in static mode and a maximum of 660µW in running mode. The chaos-based one-time pad encryption scheme using the chaos-key generator shows the advantages of using this random number generator in secure communications. In this context, the data secrecy is compared to the advanced encryption standard AES128. Moreover, the design is simulated in different working conditions such as voltage supply and temperature variations, where it is shown that the random bit output benefits from a high entropy per bit and passes the standard statistical test suite (NIST) for cryptographic applications. INDEX TERMS Chaos, random key, security, CMOS, true random number generator, one-time pad encryption, image encryption, and NIST.

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Hardware and Information Security Primitives Based on 2D Materials and Devices

Wali

Das

2023

Advanced Materials

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Hardware security is a major concern for the entire semiconductor ecosystem that accounts for billions of dollars in annual losses. Similarly, information security is a critical need for the rapidly proliferating edge devices that continuously collect and communicate a massive volume of data. While silicon‐based complementary metal‐oxide‐semiconductor technology offers security solutions, these are largely inadequate, inefficient, and often inconclusive, as well as resource intensive in time, energy, and cost, leading to tremendous room for innovation in this field. Furthermore, silicon‐based security primitives have shown vulnerability to machine learning (ML) attacks. In recent years, 2D materials such as graphene and transition metal dichalcogenides have been intensely explored to mitigate these security challenges. In this review, 2D‐materials‐based hardware security solutions such as camouflaging, true random number generation, watermarking, anticounterfeiting, physically unclonable functions, and logic locking of integrated circuits (ICs) are summarized with accompanying discussion on their reliability and resilience to ML attacks. In addition, the role of native defects in 2D materials in developing high entropy hardware security primitives is also examined. Finally, the existing challenges for 2D materials, which must be overcome for large‐scale deployment of 2D ICs to meet the security needs of the semiconductor industry, are discussed.

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3-Gb/s High-Speed True Random Number Generator Using Common-Mode Operating Comparator and Sampling Uncertainty of D Flip-Flop

Cited by 44 publications

References 10 publications

Nano-Intrinsic True Random Number Generation: A Device to Data Study

Nano-Intrinsic True Random Number Generation: A Device to Data Study

A Low Power Circuit Design for Chaos-Key Based Data Encryption

Hardware and Information Security Primitives Based on 2D Materials and Devices

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