2D Line Draw Hardware Accelerator for Tiny Embedded Processor in Consumer Electronics

Kim, Ji Kwang; Oh, Jung Hwan; Yang, Jun; Lee, Seung Eun

doi:10.1109/icce.2019.8661832

Cited by 8 publications

(2 citation statements)

References 4 publications

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“…With the development of the mobile industry, the user-centered application market has increased significantly and, as a result, the embedded system has become high-performance to meet advanced users’ requirements [ 1 ]. In particular, the embedded system is equipped with a display in order to provide a visible environment to a user interface and attempts to achieve a high-performance graphical user interface (GUI) in the embedded system have appeared [ 2 ]. As a result, not only the connection between the embedded system and the user, but also the provision of various types of sources is extended through the GUI [ 3 , 4 ].…”

Section: Introductionmentioning

confidence: 99%

Lossless Decompression Accelerator for Embedded Processor with GUI

Hwang

Cho

et al. 2021

Micromachines

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The development of the mobile industry brings about the demand for high-performance embedded systems in order to meet the requirement of user-centered application. Because of the limitation of memory resource, employing compressed data is efficient for an embedded system. However, the workload for data decompression causes an extreme bottleneck to the embedded processor. One of the ways to alleviate the bottleneck is to integrate a hardware accelerator along with the processor, constructing a system-on-chip (SoC) for the embedded system. In this paper, we propose a lossless decompression accelerator for an embedded processor, which supports LZ77 decompression and static Huffman decoding for an inflate algorithm. The accelerator is implemented on a field programmable gate array (FPGA) to verify the functional suitability and fabricated in a Samsung 65 nm complementary metal oxide semiconductor (CMOS) process. The performance of the accelerator is evaluated by the Canterbury corpus benchmark and achieved throughput up to 20.7 MB/s at 50 MHz system clock frequency.

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Section: Introductionmentioning

confidence: 99%

Lossless Decompression Accelerator for Embedded Processor with GUI

Hwang

Cho

et al. 2021

Micromachines

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“…By including the AI computing in the edge, the IoT can swiftly perform the AI operation and significantly reduce the workload of the system core on the edge. For the AI edge as an embedded system, it is essential that the computation module should be realized with restricted resources as well as operated with low power [27][28][29][30][31][32][33]. Therefore, analyzing the algorithms and neurons which occupy the resources of the AI processor and applying the processor to embedded AI system according to applications are important.…”

Section: Introductionmentioning

confidence: 99%

Intellino: Processor for Embedded Artificial Intelligence

et al. 2020

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The development of computation technology and artificial intelligence (AI) field brings about AI to be applied to various system. In addition, the research on hardware-based AI processors leads to the minimization of AI devices. By adapting the AI device to the edge of internet of things (IoT), the system can perform AI operation promptly on the edge and reduce the workload of the system core. As the edge is influenced by the characteristics of the embedded system, implementing hardware which operates with low power in restricted resources on a processor is necessary. In this paper, we propose the intellino, a processor for embedded artificial intelligence. Intellino ensures low power operation based on optimized AI algorithms and reduces the workload of the system core through the hardware implementation of a neural network. In addition, intellino’s dedicated protocol helps the embedded system to enhance the performance. We measure intellino performance, achieving over 95% accuracy, and verify our proposal with an field programmable gate array (FPGA) prototyping.

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