28 GHz common‐leg T/R IC in 65 nm CMOS technology

Abstract

A 28 GHz T/R integrated circuit (IC) using common-leg circuit in 65 nm CMOS technology is presented. The proposed common-leg T/R IC is composed of single pole double throw (SPDT) and double pole double throw (DBDT) switches, 5-bit phase shifter, and 5-bit attenuator, uni-directional amplifiers for the transmit and receive modes. The measured gains for the transmit and receive modes are 3.5 and 1 dB at 26-30 GHz, respectively. The design provides full phase control range of 360°with least significant bit (LSB) of 11.25°, and attenuation control range of 23 dB with LSB of 1 dB. The proposed common-leg T/R IC has the maximum RMS phase error of 7°, and amplitude error of 0.6 dB at 26-30 GHz. The saturated output power for the transmit mode is 0 dBm, and the input P1dB for the receive mode is −20 dBm at 28 GHz. The chip core size is 1.3 × 0.8 mm 2. The DC current is 130 mA for the transmit mode and 98 mA for the receive mode at 2.5 V supply voltage.

Design of high‐isolation and low‐loss single pole double throw switch based on the triple‐coupled transformer for ultra‐wideband phased array systems

“…For millimeter-wave phased array systems, wide operating bandwidth is more and more important to serve multiband operations and multiapplication integrations. [1][2][3] Among all the building blocks in the wideband millimeter-wave transceivers, the transmit/receive (T/R) single pole double throw (SPDT) switch is an indispensable component that enables the transmitter (TX) and the receiver (RX) to share an antenna to reduce system cost, [4][5][6] as depicted in Figure 1. SPDT switches are usually integrated into power amplifier (PA) and low-noise amplifier (LNA) modules, and it includes coupler to support envelope tracking (ET) for PA and antenna tuner to enlarge frequency covering range.…”

Common mode disturbance tolerant broadband differential SPDT switch for Ka-band radar

“…The technology advancement in the field of CMOS and BiCMOS based processes has lead to realization of integrated system with analog, RF and digital functionalities on a single-chip using system-on-chip (SoC) approach [1]. This approach is widely used in communication system, particularly for realization of frequency modulated interrupted continuous wave (FMICW) short range radar [2], and telecommunication industry, in realization of transmit/receive (T/R) module [3,4,5,6] for mm-wave phased array based 5G communication system. The SPDT switch is one of the main RF circuit blocks in FMICW and T/R modules.…”

“…Traditionally, these RF SPDT switches are being realized using III-V semiconductor technologies [11,12,13,14], since they offer high isolation and high P −1 , and introduce low insertion loss. But fabrication of multi-functional chips (MFCs) or core-chips using these processes is expensive and poses challenges in integration.. To minimize the chip area, a shunt nMOS SPDT switch is adopted in [3], however, it has poor power handling capability. In silicon circuits, to overcome the disadvantage of low-power handling capability, saturated or reverse saturated HBTs [15,16,17] are used for designing millimetre wave SPDT switches and /4 transmission line.…”