22-nm FDSOI CMOS Noise Modeling and Analysis in mm-Wave Frequency Range

Le, Quang Huy; Huynh, Dang Khoa; Lehmann, Steffen; Zhao, Zhixing; Schwan, C.; Kämpfe, Thomas; Rudolph, Matthias

doi:10.1109/sirf56960.2023.10046210

Cited by 5 publications

(1 citation statement)

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“…The impact of the cascode 𝑀2 transistor on the noise is insignificant when compared to the main 𝑀1 transistor. Furthermore, the noise from the MOSFET's source and bulk resistance is considered minimal and not taken into account for this analysis, as stated in references [33], [34]. The analysis focuses on the four primary noise sources that affect the output, namely 𝑖̅ 𝑜,𝑅𝑠 , 𝑖̅ 𝑜,𝑑 , 𝑖̅ 𝑜,𝑔 , 𝑖̅ 𝑜,𝑅𝑜𝑢𝑡 respectively [35].…”

Section: Application Example: Low Noise Amplifier Design 41 Low Noise...mentioning

confidence: 99%

Multi-objective optimization of CMOS low noise amplifier through nature-inspired swarm intelligence

2023

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This paper presents the application of two swarm intelligence techniques, multi-objective artificial bee colony (MOABC) and multi-objective particle swarm optimization (MOPSO), to the optimal design of a complementary metal oxide semiconductor (CMOS) low noise amplifier (LNA) cascode with inductive source degeneration. The aim is to achieve a balanced trade-off between voltage gain and noise figure. The optimized LNA circuit operates at 2.4 GHz with a 1.8 V power supply and is implemented in a 180 nm CMOS process. Both optimization algorithms were implemented in MATLAB and evaluated using the ZDT1, ZDT2, and ZDT3 test functions. The optimized designs were then simulated using the advance design system (ADS) simulator. The results showed that the MOABC and MOPSO techniques are practical and effective in optimizing LNA design, resulting in better performance than previously published works, with a gain of 21.2 dB and a noise figure of 0.848 dB.

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Section: Application Example: Low Noise Amplifier Design 41 Low Noise...mentioning

confidence: 99%