2.1 kV (001)- β -Ga2O3 vertical Schottky barrier diode with high-k oxide field plate

Abstract

We report a vertical β-Ga2O3 Schottky barrier diode (SBD) with BaTiO3 as field plate oxide on a low doped thick epitaxial layer exhibiting 2.1 kV breakdown voltage. A thick drift layer of 11 μm with a low effective doping concentration of 8 × 1015 cm–3 is used to achieve high breakdown voltage. Using the high-k dielectric with a dielectric constant of 248, the breakdown voltage increases from 816 V for the non-field-plated SBD to 2152 V (>2× improvement) for the field-plated SBD without compromising the on-state performance. The diode dimensions are varied to analyze the effect of edge high-field related leakage with reverse bias and also the effect of current spreading during forward operation. Very uniform distribution of breakdown voltages of 2152 ± 20 V are observed for the diode diameters from 50 to 300 μm for the field-plated SBDs. The on and off state power losses are also analyzed and compared with the non-field-plated devices and the switching losses are estimated analytically.

A simulation study of vertical Ga2O3 Schottky barrier diodes using field plate termination

“…[13][14][15][16][17][18][19][20] To demonstrate the superiority of β-Ga 2 O 3 properties for power devices, Schottky barrier diodes (SBDs) with various periphery terminations using a field plate (FP), ion implantation, and mesa structure have been reported. [21][22][23][24][25][26][27][28][29][30][31][32][33][34][35][36][37][38][39][40] However, the actual limit of the electric field in β-Ga 2 O 3 is uncertain, and its unknown physical properties prevent the precise design of device structures. In our previous work, 41) to accelerate the development of the design procedure for β-Ga 2 O 3 devices, we focused on breakdown points in SBDs with FP by applying reverse bias and derived the electric fields in a β-Ga 2 O 3 crystal.…”

Automatic optimal design of field plate for silicon on insulator lateral double‐diffused metal oxide semiconductor using simulated annealing algorithm

“…Among these techniques, the field plate (FP) technology has gained widespread popularity due to its simplified fabrication process and superior capability in improving performance. The introduction of the FP can greatly reduce the surface electric field peak at the junctions of the device, thus forming a more uniform electric field distribution [7][8][9][10][11]. During the iterative design process of FP, evaluation and design are two critical steps.…”

1 mm2, 3.6 kV, 4.8 A NiO/Ga2O3 Heterojunction Rectifiers

“…There is great current interest in the development of power electronic devices based on monoclinic β-Ga 2 O 3 . [1][2][3][4][5][6][7][8][9][10][11][12][13][14][15][16] There have been demonstrations of high breakdown voltages above 8 kV in relatively small devices of both vertical rectifiers 8 and lateral transistors intended for lower current applications. [11][12][13] A promising recent development has been the use of NiO as a p-type conducting layer to produce p-n heterojunctions with the n-type Ga 2 O 3 .…”

“…[1][2][3][4][5][6][7][8][9][10][11][12][13][14][15][16] There have been demonstrations of high breakdown voltages above 8 kV in relatively small devices of both vertical rectifiers 8 and lateral transistors intended for lower current applications. [11][12][13] A promising recent development has been the use of NiO as a p-type conducting layer to produce p-n heterojunctions with the n-type Ga 2 O 3 . [17][18][19][20][21][22][23][24][25][26][27][28][29][30][31] This to some extent mitigates the lack of a native p-type doping capability for Ga 2 O 3 .…”