1Mb 4T-2MTJ nonvolatile STT-RAM for embedded memories using 32b fine-grained power gating technique with 1.0ns/200ps wake-up/power-off times

Ohsawa, Takashi; Koike, Hideaki; Miura, S.; Honjo, Haruo; Tokutome, K.; Ikeda, Shoji; Hanyu, Takahiro; Ohno, Hideo; Endoh, Tetsuo

doi:10.1109/vlsic.2012.6243782

Cited by 48 publications

(26 citation statements)

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“…Therefore, not only during CPU standby time but also during CPU active time, consumed power can be largely and effectively saved. The EPI and IPC evaluated for other STT-MRAMs previously reported [34][35][36] are also given in Fig. 8.…”

Section: Energy Saving and Performance Of P-mtj Based Llcmentioning

confidence: 99%

Spin-transfer torque magnetoresistive random-access memory technologies for normally off computing (invited)

Ando¹,

Fujita²,

Ito³

et al. 2014

Journal of Applied Physics

110

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Most parts of present computer systems are made of volatile devices, and the power to supply them to avoid information loss causes huge energy losses. We can eliminate this meaningless energy loss by utilizing the non-volatile function of advanced spin-transfer torque magnetoresistive random-access memory (STT-MRAM) technology and create a new type of computer, i.e., normally off computers. Critical tasks to achieve normally off computers are implementations of STT-MRAM technologies in the main memory and low-level cache memories. STT-MRAM technology for applications to the main memory has been successfully developed by using perpendicular STT-MRAMs, and faster STT-MRAM technologies for applications to the cache memory are now being developed. The present status of STT-MRAMs and challenges that remain for normally off computers are discussed.

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Section: Energy Saving and Performance Of P-mtj Based Llcmentioning

confidence: 99%

Spin-transfer torque magnetoresistive random-access memory technologies for normally off computing (invited)

Ando¹,

Fujita²,

Ito³

et al. 2014

Journal of Applied Physics

110

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“…As for the MTJs, we used an advanced perpendicular (p-) STT-MRAM having high speed and low current (write time: 3 ns, write current: 50 μA) that Toshiba has recently developed [21]. A conventional STT-MRAM model (write time: 25 ns, write current: 120 μA) was used as a reference, whose performance and power are close to those of the conventional p-MTJs reported by other groups [31], and its programming energy is about Â20 larger than that of the advanced p-MTJ. Simulated results are shown in Fig.…”

Section: Dram-mram Hybrid Memory Designmentioning

confidence: 99%

“…The operation power of 6T-2MTJ NV-SRAM is almost the same as that of SRAM, since the power gating is rarely used. The operation power of 4T-2MTJ NV-SRAM is much higher than that of SRAM even though the very fast power gating scheme [31] is adopted, since the active power of 4T-2MTJ cell is very high because of large write/read current and high MTJ programming energy, as shown in Fig. 22b.…”

Section: Dram-mram Hybrid Memory Designmentioning

confidence: 99%

Advanced Perpendicular STT-MRAM Technologies for Power Reduction of High-performance Processors

Shimomura

Fujita

Abe

et al. 2015

Spintronics-Based Computing

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“…2) By replacing volatile working memories such as static random access memories (SRAMs) and dynamic random access memories (DRAMs) by nonvolatile spintronics-based ones, i.e., magnetoresistive random access memories (MRAMs), one can drastically reduce the power consumption of ICs while maintaining high performance as was demonstrated in recent studies. [3][4][5][6][7][8] Spintronics memory devices can be classified into two categories according to their structure: two-and three-terminal devices. Both devices generally include a magnetic tunnel junction (MTJ), and the read operation is performed using the tunnel magnetoresistance (TMR) effect.…”

Section: Introductionmentioning

confidence: 99%

Magnetization switching schemes for nanoscale three-terminal spintronics devices

Fukami

Ohno

2017

Jpn. J. Appl. Phys.

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Utilizing spintronics-based nonvolatile memories in integrated circuits offers a promising approach to realize ultralow-power and high-performance electronics. While two-terminal devices with spin-transfer torque switching have been extensively developed nowadays, there has been a growing interest in devices with a three-terminal structure. Of primary importance for applications is the efficient manipulation of magnetization, corresponding to information writing, in nanoscale devices. Here we review the studies of current-induced domain wall motion and spin-orbit torque-induced switching, which can be applied to the write operation of nanoscale three-terminal spintronics devices. For domain wall motion, the size dependence of device properties down to less than 20 nm will be shown and the underlying mechanism behind the results will be discussed. For spin-orbit torque-induced switching, factors governing the threshold current density and strategies to reduce it will be discussed. A proof-ofconcept demonstration of artificial intelligence using an analog spin-orbit torque device will also be reviewed.

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1Mb 4T-2MTJ nonvolatile STT-RAM for embedded memories using 32b fine-grained power gating technique with 1.0ns/200ps wake-up/power-off times

Cited by 48 publications

References 0 publications

Spin-transfer torque magnetoresistive random-access memory technologies for normally off computing (invited)

Spin-transfer torque magnetoresistive random-access memory technologies for normally off computing (invited)

Advanced Perpendicular STT-MRAM Technologies for Power Reduction of High-performance Processors

Magnetization switching schemes for nanoscale three-terminal spintronics devices

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