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Niemann, Ralf; Marwedel, Peter

doi:10.1023/a:1008832202436

Cited by 121 publications

(4 citation statements)

References 14 publications

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“…24 Much work is done in the closely related field of hardware/software partitioning. 25 Models in this field better reflect hardware properties, 26 but usually do not differentiate between software units for example, in terms of parallelizability. In order to reduce the development time of hardware-accelerated software systems, there are various efforts to anticipate the expected gain through hardware accelerators using only a high-level software description.…”

Section: State Of the Artmentioning

confidence: 99%

A comprehensive modeling approach for the task mapping problem in heterogeneous systems with dataflow processing units

Wilhelm,

Geppert,

Drewes

et al. 2023

Concurrency and Computation

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SummaryWe introduce a new model for the task mapping problem to aid in the systematic design of algorithms for heterogeneous systems including, but not limited to, CPUs, GPUs, and FPGAs. A special focus is set on the communication between the devices, its influence on parallel execution, as well as on device‐specific differences regarding parallelizability and streamability. We give a comprehensive description on how a given task mapping can be abstractly evaluated including mappings to dataflow‐based hardware accelerators. We show how this model can be utilized in different system design phases and present two novel mixed‐integer linear programs to demonstrate the usage of the model, showing significant improvements compared to pure CPU mapping for randomly generated task graphs. To the best of our knowledge, we present the first ILP for task mapping that considers pipelining effects when streaming tasks on an FPGA.

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Section: State Of the Artmentioning

confidence: 99%

A comprehensive modeling approach for the task mapping problem in heterogeneous systems with dataflow processing units

Wilhelm,

Geppert,

Drewes

et al. 2023

Concurrency and Computation

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show abstract

“…Another design-time approach to solve the mapping problem is mathematical programming, where the requirements are transformed into mathematical inequalities. After that, by utilizing different mathematical programming solutions including mixed integer linear programming (MILP) [40], Branch and bound [41], constraint programming (CP) [42], and integer linear programming (ILP) [43], the inequalities are solved. In the mathematical programming approach, the optimal solution is always guaranteed as long as the complexity of the mapping problem does not become NP.…”

Section: Mapping Techniquesmentioning

confidence: 99%

“…There are several works regarding the static mapping problem comprising various optimization objectives that have utilized the ILP method. For instance, [40,43,54,55] have studied the design-time mapping problem in homogeneous multi-core architecture using the ILP method while optimizing their solutions considering performance, energy consumption, and temperature as the optimization parameters. Authors in [56] utilized the same method to solve mapping for a heterogeneous architecture, including different optimization goals such as execution time, reliability, and temperature.…”

Section: Optimization Parameters In Mappingmentioning

confidence: 99%

E/E Architecture Synthesis: Challenges and Technologies

Askaripoor

Farzaneh²,

Knoll

2022

Electronics

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In recent years, the electrical and/or electronic architecture of vehicles has been significantly evolving. The new generation of cars demands a considerable amount of computational power due to a large number of safety-critical applications and driver-assisted functionalities. Consequently, a high-performance computing unit is required to provide the demanded power and process these applications while, in this case, vehicle architecture moves toward a centralized architecture. Simultaneously, appropriate software architecture has to be defined to fulfill the needs of the main computing unit and functional safety requirements. However, the process of configuring and integrating critical applications into a vehicle central computer while meeting safety requirements and optimization objectives is a time-consuming, complicated, and error-prone process. In this paper, we firstly present the evolution of the vehicle architecture, past, present, and future, and its current bottlenecks and future key technologies. Then, challenges of software configuration and mapping for automotive systems are discussed. Accordingly, mapping techniques and optimization objectives for mapping tasks to multi-core processors using design space exploration method are studied. Moreover, the current technologies and frameworks regarding the vehicle architecture synthesis, model analysis with regard to software integration and configuration, and solving the mapping problem for automotive embedded systems are expressed. Finally, we propose four research questions as future works for this field of study.

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“…Such search strategies can be based on exact, but typically unscalable, methods that guarantee finding the optimal solution(s). These exact methods can, for example, be implemented using integer linear programming (ILP) solutions (e.g., References [6,7]) or branch & bound algorithms (e.g., Reference [8]). Alternatively, so-called meta-heurisics, such as genetic algorithms (GA) or simulated annealing, can be used to search the design space for optimal solutions.…”

mentioning

confidence: 99%

A Case for Security-Aware Design-Space Exploration of Embedded Systems

Pimentel¹

2020

JLPEA

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As modern embedded systems are becoming more and more ubiquitous and interconnected, they attract a world-wide attention of attackers and the security aspect is more important than ever during the design of those systems. Moreover, given the ever-increasing complexity of the applications that run on these systems, it becomes increasingly difficult to meet all security criteria. While extra-functional design objectives such as performance and power/energy consumption are typically taken into account already during the very early stages of embedded systems design, system security is still mostly considered as an afterthought. That is, security is usually not regarded in the process of (early) design-space exploration of embedded systems, which is the critical process of multi-objective optimization that aims at optimizing the extra-functional behavior of a design. This position paper argues for the development of techniques for quantifying the ’degree of secureness’ of embedded system design instances such that these can be incorporated in a multi-objective optimization process. Such technology would allow for the optimization of security aspects of embedded systems during the earliest design phases as well as for studying the trade-offs between security and the other design objectives such as performance, power consumption and cost.

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Untitled

Cited by 121 publications

References 14 publications

A comprehensive modeling approach for the task mapping problem in heterogeneous systems with dataflow processing units

A comprehensive modeling approach for the task mapping problem in heterogeneous systems with dataflow processing units

E/E Architecture Synthesis: Challenges and Technologies

A Case for Security-Aware Design-Space Exploration of Embedded Systems

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