12. To the Poet Ya Xian

Qin, Shang; Chang, Sung-sheng Yvonne; Yeh, Michelle; Fan, Ming-ju

doi:10.7312/chan16576-068

Cited by 2 publications

(2 citation statements)

References 0 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Glass offers the ability to tailor the CTE from 3ppm/C to 10ppm/C with several CTE values available in between. This benefit of selecting glass CTE in between that of silicon and FR-4 enables board-level reliability of glass BGA packages extendable to larger body sizes [5]. Figure 11 shows the top view of a fully integrated glass BGA package for the mobile application processor emulator after SMT attach to board.…”

Section: Rdl Micro Via Formationmentioning

confidence: 98%

First demonstration of a surface mountable, ultra-thin glass BGA package for smart mobile logic devices

Sato

Seki

Takagi

et al. 2014

2014 IEEE 64th Electronic Components and Technology Conference (ECTC)

View full text Add to dashboard Cite

This paper presents the first demonstration of an ultra-thin glass BGA package that is assembled on to mother board with standard SMT technology. Such a package has many new advances that include ultra-thin glass, high speed through via hole formation and copper metallization, double-side RDL wiring with advanced 3 micron ground rules, and Cu-SnAg microbump assembly of a 10mm silicon test die. Glass, as a package, overcomes the shortcomings of organic packages in bump pitch, CTE mismatch to Si and warpage and silicon interposers in electrical performance and cost. Glass packages are being developed to manufacture both as wafers for improved performance over Si and as panels to improve bump pitch over organic packages. Glass, therefore, is not just a high performance and low volume technology, like silicon interposers, but a pervasive package technology with lower cost, higher performance and thinner than silicon and organic packages. Glass has compelling benefits in thickness and I/O pitch reduction and reliability for one of the highest volume applications, namely, the packaging of high I/O logic devices for smart mobile systems. This paper represents a paradigm shift in ultra-thin packages using large glass panels for future smart mobile and high performance devices, and the first demonstration of 100um thin glass packages with 50-80um chip-level I/O pitch and 18mm x 18mm body size surface mount assembly at 400um pitch. IntroductionGlass packaging started at Georgia Tech and many other R&D groups as a lower cost and higher performance alternative to silicon interposers, due to the low loss and large panel availability of ultra-thin glass [1]. The Georgia Tech team began to demonstrate such an interposer with its industry partners addressing major barriers that include the handling of large, ultra-thin glass panels, forming large number of ultrasmall through vias at small pitch, metallization of these small copper vias without defects and with good adhesion, forming 2-5 micron RDL wiring layers with bump pitch at 20-50 microns, assembly of chips to these brittle substrates, and improving its thermal conductivity. It became clear that glass can be a pervasive platform technology that is both a high performance and very low cost technology. As the glass packaging technology matures and is applied to high volume applications, it should be at the same or lower cost than organic packaging. Glass simplifies the material manufacturing compared to laminates, since FR-4 or low CTE laminates require four different materials and process technologies such as glass fiber, glass and ceramic fillers,

show abstract

Section: Rdl Micro Via Formationmentioning

confidence: 98%

First demonstration of a surface mountable, ultra-thin glass BGA package for smart mobile logic devices

Sato

Seki

Takagi

et al. 2014

2014 IEEE 64th Electronic Components and Technology Conference (ECTC)

View full text Add to dashboard Cite

show abstract

“…While glass interposer is able to achieve closely-matched CTE with low cost, the fabrication process is currently not stable enough to produce fine pitch patterns compared to the silicon. In addition, although organic interposer is cost-effective, it has disadvantages of limited I/O density and CTE mismatch [3][4][5]. Since they have different electrical properties and features depending on the substrate material, the performance of interposer channels are different.…”

Section: Introductionmentioning

confidence: 99%

Crosstalk included eye diagram estimation of high-speed and wide I/O interposer channel for 2.5D / 3D IC

Choi

Kim

et al. 2014

2014 IEEE 23rd Conference on Electrical Performance of Electronic Packaging and Systems

View full text Add to dashboard Cite

In this paper, crosstalk included eye diagram of high-speed and wide I/O interposer channels are simulated and analyzed. To analyze the crosstalk effect of various substrate channels, silicon, glass, and organic interposers are simulated and compared under the same physical dimensions. In addition, crosstalk included eye diagrams are accurately estimated in short time using 8 worst case input signals. The estimated eye diagrams are investigated at data rate of 10 Gbps.

show abstract

12. To the Poet Ya Xian

Cited by 2 publications

References 0 publications

First demonstration of a surface mountable, ultra-thin glass BGA package for smart mobile logic devices

First demonstration of a surface mountable, ultra-thin glass BGA package for smart mobile logic devices

Crosstalk included eye diagram estimation of high-speed and wide I/O interposer channel for 2.5D / 3D IC

Contact Info

Product

Resources

About