2009
DOI: 10.1590/s0103-17592009000100004
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A runtime stability analysis of clock synchronization precision on a time-triggered bus prototype

Abstract: This paper provides a runtime stability analysis of the Daisy-Chain clock synchronization algorithm running over CASCA - a time-triggered extension of CAN bus. The main objective is to show with practical results how to achieve global time base of high precision and how this precision is affected by the modification of the TDMA transmission schedule. That contributes by providing some basic guidelines for the task of designing time-triggered, TDMA-based distributed systems for embedded control applications. Show more

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“…A classical example is TTCAN level 2, which introduces a dedicated Network Time Unit to synchronize the local time with the network time [19], reaching a synchronization precision around 10 µs. Also [20] implements a TDMA scheme with dedicated hardware. The theoretically achieved precision is less than 1 µs, however at the expense of an extremely high resynchronization rate leading to a high bus load, which makes the approach impractical.…”
Section: Related Workmentioning
confidence: 99%
“…A classical example is TTCAN level 2, which introduces a dedicated Network Time Unit to synchronize the local time with the network time [19], reaching a synchronization precision around 10 µs. Also [20] implements a TDMA scheme with dedicated hardware. The theoretically achieved precision is less than 1 µs, however at the expense of an extremely high resynchronization rate leading to a high bus load, which makes the approach impractical.…”
Section: Related Workmentioning
confidence: 99%