10-Gb/s all-silicon optical receiver

Ye, Bo; Schaub, J.D.; Csutak, S.M.; Rogers, Derek J.; Campbell, Joe C.

doi:10.1109/lpt.2003.810261

Cited by 68 publications

(48 citation statements)

References 7 publications

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“…Short-distance optical data transmission systems have been widely studied to realize board-to-board and chip-to-chip high-speed data transmission [1][2][3]. In these applications, short wavelength vertical-cavity surface-emitting lasers (VCSELs) and silicon (Si) photodiodes (PDs) are used for low-cost system configuration.…”

Section: Introductionmentioning

confidence: 99%

Characterizing Silicon Avalanche Photodiode Fabricated by Standard 0.18µm CMOS Process for High-Speed Operation

Napiah

Gyobu

Hishiki

et al. 2016

IEICE Trans. Electron.

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SUMMARYnMOS-type and pMOS-type silicon avalanche photodiodes (APDs) were fabricated by standard 0.18 µm CMOS process, and the current-voltage characteristic and the frequency response of the APDs with and without guard ring structure were measured. The role of the guard ring is cancellation of photo-generated carriers in a deep layer and a substrate. The bandwidth of the APD is enhanced with the guard ring structure at a sacrifice of the responsivity. Based on comparison of nMOS-type and pMOS-type APDs, the nMOS-type APD is more suitable for high-speed operation. The bandwidth is enhanced with decreasing the spacing of interdigital electrodes due to decreased carrier transit time and with decreasing the detection area and the PAD size for RF probing due to decreased device capacitance. The maximum bandwidth was achieved with the avalanche gain of about 10. Finally, we fabricated a nMOS-type APD with the electrode spacing of 0.84 µm, the detection area of 10 × 10 µm 2 , the PAD size for RF probing of 30 × 30 µm 2 , and with the guard ring structure. The maximum bandwidth of 8.4 GHz was achieved along with the gain-bandwidth product of 280 GHz.

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Section: Introductionmentioning

confidence: 99%

Characterizing Silicon Avalanche Photodiode Fabricated by Standard 0.18µm CMOS Process for High-Speed Operation

Napiah

Gyobu

Hishiki

et al. 2016

IEICE Trans. Electron.

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“…Several attempts have been made to overcome this drawback. Additional lowdoped layers or silicon-on-insulator technique have been considered [2,3], but these require additional fabrication costs. As an attempt for realizing high-speed and highresponsivity photodetectors with standard CMOS technology without any process modification, we have investigated CMOS-compatible avalanche photodetectors (CMOS-APDs) based on P + /N-well and N + /P-well junctions [4,5].…”

Section: Introductionmentioning

confidence: 99%

Performance Comparison of Two Types of Silicon Avalanche Photodetectors Based on N-well/P-substrate and P⁺/N-well Junctions Fabricated With Standard CMOS Technology

Lee¹,

Choi²

2011

Journal of the Optical Society of Korea

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We characterize and analyze silicon avalanche photodetectors (APDs) fabricated with standard complementary metal-oxide-semiconductor (CMOS) technology. Current characteristics, responsivity, avalanche gain, and photodetection bandwidth of CMOS-APDs based on two types of PN junctions, N-well/Psubstrate and P + /N-well junctions, are compared and analyzed. It is demonstrated that the CMOS-APD using the P + /N-well junction has higher responsivity as well as higher photodetection bandwidth than N-well/P-substrate. In addition, the important factors influencing CMOS-APD performance are clarified from this investigation.

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“…However, the large penetration depth of 850 nm light in Si results in a speed limitation as well as low quantum efficiency [3]. In order to mitigate these problems, a low-doped epitaxial layer [3] or silicon-on-insulator (SOI) substrate [4] has been used. However, these methods require significant process modification, which increases fabrication cost and decreases process yields.…”

Section: Introductionmentioning

confidence: 99%

7-Gb/s monolithic photoreceiver fabricated with 0.25-.MU.m SiGe BiCMOS technology

Youn

Lee

Park

et al. 2010

IEICE Electron. Express

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Abstract:We demonstrate an 850-nm high-speed photoreceiver with a monolithically integrated silicon avalanche photodetector for optical interconnect applications. The photoreceiver is fabricated with standard 0.25-µm SiGe bipolar complementary metal-oxide-semiconductor technology without any process modification. The photoreceiver achieves 7-Gb/s optical data transmission with the bit-error rate less than 10 −10 at −1 dBm incident optical power. Keywords: high-speed photoreceiver, Si avalanche photodetectors, SiGe BiCMOS, transimpedance amplifier Classification: Fiber optics, Microwave photonics, Optical interconnection, Photonic signal processing, Photonic integration and systems References

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10-Gb/s all-silicon optical receiver

Cited by 68 publications

References 7 publications

Characterizing Silicon Avalanche Photodiode Fabricated by Standard 0.18µm CMOS Process for High-Speed Operation

Characterizing Silicon Avalanche Photodiode Fabricated by Standard 0.18µm CMOS Process for High-Speed Operation

Performance Comparison of Two Types of Silicon Avalanche Photodetectors Based on N-well/P-substrate and P⁺/N-well Junctions Fabricated With Standard CMOS Technology

7-Gb/s monolithic photoreceiver fabricated with 0.25-.MU.m SiGe BiCMOS technology

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10-Gb/s all-silicon optical receiver

Cited by 68 publications

References 7 publications

Characterizing Silicon Avalanche Photodiode Fabricated by Standard 0.18µm CMOS Process for High-Speed Operation

Characterizing Silicon Avalanche Photodiode Fabricated by Standard 0.18µm CMOS Process for High-Speed Operation

Performance Comparison of Two Types of Silicon Avalanche Photodetectors Based on N-well/P-substrate and P+/N-well Junctions Fabricated With Standard CMOS Technology

7-Gb/s monolithic photoreceiver fabricated with 0.25-.MU.m SiGe BiCMOS technology

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Performance Comparison of Two Types of Silicon Avalanche Photodetectors Based on N-well/P-substrate and P⁺/N-well Junctions Fabricated With Standard CMOS Technology