10-bit SAR ADC Design in a Double-Poly 180 nm CMOS Process

Dubovitskiy, Konstantin; Liubavin, Kirill D.; Ermakov, Igor V.; Zubov, Igor; Nuykin, Andrey V.

doi:10.1109/elconrus51938.2021.9396523

2021 IEEE Conference of Russian Young Researchers in Electrical and Electronic Engineering (ElConRus) 2021

DOI: 10.1109/elconrus51938.2021.9396523

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10-bit SAR ADC Design in a Double-Poly 180 nm CMOS Process

Konstantin Dubovitskiy

Kirill D. Liubavin

Igor V. Ermakov

et al.

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Design and Optimization of a Low-Power Comparator for a 10-Bit Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) for General-Purpose Applications

M P,

Venkateshappa

2024

2024 International Conference on Intelligent and Innovative Technologies in Computing, Electrical and Electronics (IITCEE)

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Design and Optimization of a Low-Power Comparator for a 10-Bit Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) for General-Purpose Applications

M P,

Venkateshappa

2024

2024 International Conference on Intelligent and Innovative Technologies in Computing, Electrical and Electronics (IITCEE)

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10-bit SAR ADC Design in a Double-Poly 180 nm CMOS Process

Cited by 1 publication

References 2 publications

Design and Optimization of a Low-Power Comparator for a 10-Bit Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) for General-Purpose Applications

Design and Optimization of a Low-Power Comparator for a 10-Bit Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) for General-Purpose Applications

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