10.7 A 0.26mm<sup>2</sup> DPD-Less Quadrature Digital Transmitter With &lt;−40dB EVM Over &gt;30dB P<sub>out</sub> Range in 65nm CMOS

Yoo, Seongwoo; Hung, Shih-Chang; Walling, Jeffrey S.; Allstot, D.J.; Yoo, Sang-Min

doi:10.1109/isscc19947.2020.9063070

Cited by 13 publications

(21 citation statements)

References 3 publications

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“…When the bit-cell is reset, half of the capacitors are connected to ground and half to @ AA . This grounding scheme reduces the PMOS/NMOS on-resistance mismatches and improves the linearity of the SCPA [5].…”

Section: Circuit Details and Simulation Resultsmentioning

confidence: 99%

I/Q-Sharing Switched-Capacitor Power Amplifier with Baseband Harmonic-Rejection and Wilkinson Combiner

Qiao

Kayyil

Walling

et al. 2021

2021 IEEE International Symposium on Circuits and Systems (ISCAS)

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The CMOS switched-capacitor power amplifier (SCPA) proposed in 2011 [1]-[2] achieved much higher system efficiency than conventional transmitter architectures. In this paper, SCPA linearity is also analyzed and improved with new techniques. Specifically, a baseband harmonic-rejection (BBHR) technique is used to minimize the counter third-order intermodulation products (C-IM3). Also, using a Wilkinson combiner, the cross-coupling between two sub-SCPAs is isolated to enable a linear harmonic-rejection summation. With the proposed topology, the linearity is improved significantly compared to a conventional I/Q-sharing SCPA. More specifically, the C-IM3 is reduced by ~25 dB with a single-tone input and by ~22 dB with modulated signal.

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Section: Circuit Details and Simulation Resultsmentioning

confidence: 99%

I/Q-Sharing Switched-Capacitor Power Amplifier with Baseband Harmonic-Rejection and Wilkinson Combiner

Qiao

Kayyil

Walling

et al. 2021

2021 IEEE International Symposium on Circuits and Systems (ISCAS)

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“…The envelope amplitude at the output of an SCPA is directly proportional to fraction of capacitors in the array being switched, whereas the phase of the radio frequency (RF) output is controlled by the clock phases applied to the switches as exemplified in Fig. 2 [1]- [6]. There are two modes of operation for switches in the SCPA: (1) Switching mode-the first set of n switches operate between the supply voltage and ground.…”

Section: Source Of Am-pm Nonlinearitymentioning

confidence: 99%

“…As an aside, it was recently shown that the resistances can be equalized by eliminating the unpredictable nonoverlapping clock periods at the expense of increased overlap current with a concomitant reduction in the overall poweradded efficiency (PAE) [6]. Gnd.…”

Section: Source Of Am-pm Nonlinearitymentioning

confidence: 99%

Linearity Improvement Techniques for CMOS Switched-Capacitor Power Amplifiers

Kayyil

Qiao

Allstot

2021

2021 IEEE International Symposium on Circuits and Systems (ISCAS)

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The CMOS switched-capacitor power amplifier (SCPA) architecture was disclosed by S.M. Yoo, et al., in 2011 [1]-[2]. It enabled the design of fully-integrated radio frequency (RF) transmitters with much higher power-added efficiency (PAE) than previous approaches. Herein, new techniques are introduced that also increase SCPA linearity. Specifically, a new switching scheme decreases the amplitude modulation to phase modulation (AM-PM) distortion. When applied to class-G SCPAs [3]-[4], the linearity using the new switching scheme is improved significantly compared to conventional SCPA implementations. More specifically, the AM-PM non-linearity of the class-G SCPA is reduced by about ~ 4X and the error vector magnitude (EVM) is improved by ~ 3 dB.

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“…This has been further enhanced with e.g. non-uniform element scaling [4], phase feedback [6], clock overlap and non-switching NMOS/PMOS linearization [5], [7], series linearization resistors [8] and wideband power supplies [9].…”

Section: Introductionmentioning

confidence: 99%

“…Switched capacitor power amplifiers (SCPAs) are digital transmitters with good drain efficiency (DE) and high linearity due to accuratelly matched capacitor ratios [5], [7], [10]- [12]. Their behavior is modelled in Figure 1 as an array of N switched voltages and a capacitive divider with total capacitance of C s .…”

Section: Introductionmentioning

confidence: 99%

A Predistortion-Less Digital Transmitter With −50-dB ACLR Exploiting Output Conductance Linearization

Zanen

Klumperink

Nauta

2021

IEEE Solid-State Circuits Lett.

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Switched capacitor power amplifiers (SCPAs) are a class of digital transmitters which have shown promising results for high linearity with good drain efficiency (DE). Their linearity is limited by AM-PM distortion, caused by a difference in output conductance in switching and non-switching driver cells. Often, digital predistortion (DPD) is required to transmit higher order modulation schemes. In this letter, a driver cell implementation as an inverter with drain resistors is proposed which has equal output conductance in both cases, aiming to eliminate AM-PM distortion. An SCPA with these driver cells is implemented in a 22nm fully depleted silicon-on-insulator (FD-SOI) CMOS process which demonstrates excellent DPD-less linearity with an adjacent channel leakage ratio (ACLR) of -50 dB and an error vector magnitude (EVM) of -45.5 dB for 5 MHz 1024 QAM signals at a DE of 8.8%. A matching network exploiting bondwires as high-Q inductors removes on-chip inductors and significantly reduces chip area.

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10.7 A 0.26mm² DPD-Less Quadrature Digital Transmitter With <−40dB EVM Over >30dB P_out Range in 65nm CMOS

Cited by 13 publications

References 3 publications

I/Q-Sharing Switched-Capacitor Power Amplifier with Baseband Harmonic-Rejection and Wilkinson Combiner

I/Q-Sharing Switched-Capacitor Power Amplifier with Baseband Harmonic-Rejection and Wilkinson Combiner

Linearity Improvement Techniques for CMOS Switched-Capacitor Power Amplifiers

A Predistortion-Less Digital Transmitter With −50-dB ACLR Exploiting Output Conductance Linearization

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10.7 A 0.26mm2 DPD-Less Quadrature Digital Transmitter With <−40dB EVM Over >30dB Pout Range in 65nm CMOS

Cited by 13 publications

References 3 publications

I/Q-Sharing Switched-Capacitor Power Amplifier with Baseband Harmonic-Rejection and Wilkinson Combiner

I/Q-Sharing Switched-Capacitor Power Amplifier with Baseband Harmonic-Rejection and Wilkinson Combiner

Linearity Improvement Techniques for CMOS Switched-Capacitor Power Amplifiers

A Predistortion-Less Digital Transmitter With −50-dB ACLR Exploiting Output Conductance Linearization

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Product

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10.7 A 0.26mm² DPD-Less Quadrature Digital Transmitter With <−40dB EVM Over >30dB P_out Range in 65nm CMOS