1.2-V Supply, 100-nW, 1.09-V Bandgap and 0.7-V Supply, 52.5-nW, 0.55-V Subbandgap Reference Circuits for Nanowatt CMOS LSIs

Osaki, Yuji; Hirose, Takahisa; Kuroki, Nobutaka; Numa, Masahiro

doi:10.1109/jssc.2013.2252523

Cited by 238 publications

(74 citation statements)

References 15 publications

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“…As pointed out in (7), there is a strong dependence of the BJT bias on the absolute value of the MOSFET threshold voltage, that varies significantly from batch to batch. Other authors have noticed that reports of variability results in such voltage references are still somewhat poor [11], specially regarding experimental results from a significant number of samples, and from different fabrication batches, which would reveal the average process variability dependencies. For that reason, no comparison table of variability results is presented.…”

Section: Simulation Resultsmentioning

confidence: 98%

0.7 V supply, 8 nW, 8 ppm/°C resistorless sub-bandgap voltage reference

Mattia

Klimach

Bampi

2014

2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS)

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In this work a new resistorless sub-bandgap voltage reference topology is presented. It is a self-biased and small area circuit that works in the nano-ampere consumption range, and under 1 V of power supply. The behavior of the circuit is analitically described, a design methodology is proposed and simulation results are presented for a standard 0.18 µm CMOS process. A reference voltage of 463 mV is demonstrated, with a temperature coefficient of 8 ppm/ o C for the 0 to 125 • C range, while the power consumption of the whole circuit is 8.25 nW under a 0.75 V power supply at 27 o C. The estimated silicon area is 0.0043 mm 2 .

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Section: Simulation Resultsmentioning

confidence: 98%

0.7 V supply, 8 nW, 8 ppm/°C resistorless sub-bandgap voltage reference

Mattia

Klimach

Bampi

2014

2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS)

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“…The reference circuit loosely based on [25] is used to establish the required noise shaping and precision in the ∆Σ modulators. This provides a stable bias current using the structure shown in Fig.…”

Section: Reference and Biasing Circuitmentioning

confidence: 99%

Autonomous SoC for Neural Local Field Potential Recording in mm-Scale Wireless Implants

Leene

Maslik

Feng

et al. 2018

2018 IEEE International Symposium on Circuits and Systems (ISCAS)

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Abstract-Next generation brain machine interfaces fundamentally need to improve the information transfer rate and chronic consistency when observing neural activity over a long period of time. Towards this aim, this paper presents a novel System-on-Chip (SoC) for a mm-scale wireless neural recording node that can be implanted in a distributed fashion. The proposed self-regulating architecture allows each implant to operate autonomously and adaptively load the electromagnetic field to extract a precise amount of power for full-system operation. This can allow for a large number of recording sites across multiple implants extending through cortical regions without increased control overhead in the external head-stage. By observing local field potentials (LFPs) only, chronic stability is improved and good coverage is achieved whilst reducing the spatial density of recording sites. The system features a ∆Σ based instrumentation circuit that digitises high fidelity signal features at the sensor interface thereby minimising analogue resource requirements while maintaining exceptional noise efficiency. This has been implemented in a 0.35 µm CMOS technology allowing for waferscale post-processing for integration of electrodes, RF coil, electronics and packaging within a 3D structure. The presented configuration will record LFPs from 8 electrodes with a 825 Hz bandwidth and an input referred noise figure of 1.77µVrms. The resulting electronics has a core area of 2.1 mm 2 and a power budget of 92 µW.

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“…In this paper, an ultra-low-power bandgap reference without resistors is proposed for the RF energy harvester. Based on the structure of [10], the presented bandgap accepts the base-emitter voltage of the bipolar transistor and generates a 1.1-V reference voltage in combination with proportional-to-absolute-temperature (PTAT) voltage generators. Figure 6 shows the schematic of the proposed PTAT voltage generator and the bandgap reference.…”

Section: Ultra-low-power Bandgap Reference and Nano-ampere Biasmentioning

confidence: 99%

An Ultra-Low-Power Integrated RF Energy Harvesting System in 65-nm CMOS Process

Liu

et al. 2015

Circuits Syst Signal Process

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In recent years, radio frequency (RF) energy harvesting systems have gained significant interest as inexhaustible replacements for traditional batteries in RF identification and wireless sensor network nodes. This paper presents an ultra-low-power integrated RF energy harvesting circuit in a SMIC 65-nm standard CMOS process. The presented circuit mainly consists of an impedance-matching network, a 10-stage rectifier with order-2 threshold compensation and an ultra-low-power power manager unit (PMU). The PMU consists of a voltage sensor, a voltage limiter and a capacitor-less low-dropout regulator. In the charge mode, the power consumption of the proposed energy harvesting circuit is only 97 nA, and the RF input power can be as low as −21.4 dBm (7.24 µW). In the burst mode, the device can supply a 1.0-V DC output voltage with a maximum 10-mA load current. The simulated results demonstrate that B Lian-xi Liu adam79416@126.com; Circuits Syst Signal Process the modified RF rectifier can obtain a maximum efficiency of 12 % with a 915-MHz RF input. The circuit can operate over a temperature range from −40 to 125 • C which exceeds the achievable temperature performance of previous RF energy harvesters in standard CMOS process.

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1.2-V Supply, 100-nW, 1.09-V Bandgap and 0.7-V Supply, 52.5-nW, 0.55-V Subbandgap Reference Circuits for Nanowatt CMOS LSIs

Cited by 238 publications

References 15 publications

0.7 V supply, 8 nW, 8 ppm/°C resistorless sub-bandgap voltage reference

0.7 V supply, 8 nW, 8 ppm/°C resistorless sub-bandgap voltage reference

Autonomous SoC for Neural Local Field Potential Recording in mm-Scale Wireless Implants

An Ultra-Low-Power Integrated RF Energy Harvesting System in 65-nm CMOS Process

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1.2-V Supply, 100-nW, 1.09-V Bandgap and 0.7-V Supply, 52.5-nW, 0.55-V Subbandgap Reference Circuits for Nanowatt CMOS LSIs

Cited by 238 publications

References 15 publications

0.7 V supply, 8 nW, 8 ppm/&#x00B0;C resistorless sub-bandgap voltage reference

0.7 V supply, 8 nW, 8 ppm/&#x00B0;C resistorless sub-bandgap voltage reference

Autonomous SoC for Neural Local Field Potential Recording in mm-Scale Wireless Implants

An Ultra-Low-Power Integrated RF Energy Harvesting System in 65-nm CMOS Process

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Product

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0.7 V supply, 8 nW, 8 ppm/°C resistorless sub-bandgap voltage reference

0.7 V supply, 8 nW, 8 ppm/°C resistorless sub-bandgap voltage reference