0.65 V integrable electronic realisation of integer‐ and fractional‐order Hindmarsh–Rose neuron model using companding technique

Khanday, Farooq Ahmad; Dar, Mohammad Rafiq; Kant, Nasir Ali; Rosselló, Josep L.; Psychalinos, Costas

doi:10.1049/iet-cds.2018.5033

Cited by 15 publications

(9 citation statements)

References 38 publications

(77 reference statements)

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“…The sharp transition region, shown in Figure 2C, has been exploited to get spiking behavior with least energy consumption. This eliminates the need of special post‐CMOS devices and complex additional circuitry reported in previous studies 10–29 . The neuronal operation of the proposed design can be understood from Figure 2A.…”

Section: Concept and Operation Of The Proposed Designmentioning

confidence: 87%

“…Various CMOS and post‐CMOS devices have been used for electrical implementation of an LIF neuron, as proposed in the literature 10–29 . To obtain the energy‐efficient behavior, devices with sharp breakdown characteristics have been preferred.…”

Section: Concept and Operation Of The Proposed Designmentioning

confidence: 99%

“…The initial implementation of spiking neurons used traditional CMOS devices, 10–16 involving many components per neuron. However, these designs were very complex and proved inefficient in terms of integration density and energy consumption.…”

Section: Introductionmentioning

confidence: 99%

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An energy‐efficient tunable threshold spiking neuron with excitatory and inhibitory function

Khanday,

Khanday

2024

Int J Numerical Modelling

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In this work, a complementary metal‐oxide‐semiconductor (CMOS) based leaky‐integrate and fire neuron has been proposed and investigated for neuromorphic applications. The neuron has been designed in Cadence Virtuoso and validated experimentally. It has been observed that the neuron consumes a maximum energy of 68.87 fJ/spike. The response of the neuron to excitatory as well as inhibitory inputs has been studied. To verify the applicability, the proposed neuron has been explored for reconfigurable threshold logic to implement various linearly separable Boolean functions including OR, AND, NOT, NOR, and NAND. Moreover, the threshold tunability of the neuron has also been verified and this property has been exploited to design threshold‐controlled logic gates. Instead of adjusting the weights of the applied inputs, the functionality of such gates can be controlled by changing the threshold of the neuron, simplifying the synaptic architecture of a neural network. Finally, a multilayer network has been designed and the recognition ability of the proposed network for MNIST handwritten digits has been verified with an accuracy of 96.93%.

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Section: Concept and Operation Of The Proposed Designmentioning

confidence: 87%

Section: Concept and Operation Of The Proposed Designmentioning

confidence: 99%

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An energy‐efficient tunable threshold spiking neuron with excitatory and inhibitory function

Khanday,

Khanday

2024

Int J Numerical Modelling

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“…An incommensurate fractional-order Rössler system was implemented, using CMOS OTAs in [22]. The CMOS OTA was also used to design the fractional-order Newton-Leipnik chaotic system [23], and fractional-order neuron models [24,25]. In this manner, we show the CMOS OTA-based design of a fractional-order integrator that is approximated by a Laplace transfer function, as shown in [1].…”

Section: Introductionmentioning

confidence: 99%

CMOS OTA-Based Filters for Designing Fractional-Order Chaotic Oscillators

et al. 2021

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Fractional-order chaotic oscillators (FOCOs) have shown more complexity than integer-order chaotic ones. However, the majority of electronic implementations were performed using embedded systems; compared to analog implementations, they require huge hardware resources to approximate the solution of the fractional-order derivatives. In this manner, we propose the design of FOCOs using fractional-order integrators based on operational transconductance amplifiers (OTAs). The case study shows the implementation of FOCOs by cascading first-order OTA-based filters designed with complementary metal-oxide-semiconductor (CMOS) technology. The OTAs have programmable transconductance, and the robustness of the fractional-order integrator is verified by performing process, voltage and temperature variations as well as Monte Carlo analyses for a CMOS technology of 180 nm from the United Microelectronics Corporation. Finally, it is highlighted that post-layout simulations are in good agreement with the simulations of the mathematical model of the FOCO.

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“…Neural networks are advancing to mimic the functionality of the human brain and reproduce its remarkable perception, signal processing and thought abilities. Many efforts have been made to reproduce neural networks/systems from a simplistic perceptron model [1] to the even more complex and biologically inspired neural models [2][3][4][5]. The development in this area of study aims to find effective and biologically stable circuit designs for its hardware implementation.…”

Section: Introductionmentioning

confidence: 99%

Implementation of an efficient magnetic tunnel junction-based stochastic neural network with application to iris data classification

Nisar¹,

Khanday²,

Kaushik³

2020

Nanotechnology

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Stochastic neuromorphic computation (SNC) has the potential to enable a low power, error tolerant and scalable computing platform in comparison to its deterministic counterparts. However, the hardware implementation of complementary metal oxide semiconductor (CMOS)-based stochastic circuits involves conversion blocks that cost more than the actual processing circuits. The realization of the activation function for SNCs also requires a complicated circuit that results in a significant amount of power dissipation and area overhead. The inherent probabilistic switching behavior of nanomagnets provides an advantage to overcome these complexity issues for the realization of low power and area efficient SNC systems. This paper presents magnetic tunnel junction (MTJ)-based stochastic computing methodology for the implementation of a neural network. The stochastic switching behavior of the MTJ has been exploited to design a binary to stochastic converter to mitigate the complexity of the CMOS-based design. The paper also presents the technique for realizing stochastic sigmoid activation function using an MTJ. Such circuits are simpler than existing ones and use considerably less power. An image classification system employing the proposed circuits has been implemented to verify the effectiveness of the technique. The MTJ-based SNC system shows area and energy reduction by a factor of 13.5 and 2.5, respectively, while the prediction accuracy is 86.66%. Furthermore, this paper investigates how crucial parameters, such as stochastic bitstream length, number of hidden layers and number of nodes in a hidden layer, need to be set precisely to realize an efficient MTJ-based stochastic neural network (SNN). The proposed methodology can prove a promising alternative for highly efficient digital stochastic computing applications.

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0.65 V integrable electronic realisation of integer‐ and fractional‐order Hindmarsh–Rose neuron model using companding technique

Cited by 15 publications

References 38 publications

An energy‐efficient tunable threshold spiking neuron with excitatory and inhibitory function

An energy‐efficient tunable threshold spiking neuron with excitatory and inhibitory function

CMOS OTA-Based Filters for Designing Fractional-Order Chaotic Oscillators

Implementation of an efficient magnetic tunnel junction-based stochastic neural network with application to iris data classification

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