0.15 μm SOI DRAM technology incorporating sub-volt dynamic threshold devices for embedded mixed-signal &amp; RF circuits

Goldman, D.; DeGregorio, K.; Kim, C.S.; Nielson, M.; Zahurak, J.; Parke, S.

doi:10.1109/soic.2001.958004

2001 IEEE International SOI Conference. Proceedings (Cat. No.01CH37207)

DOI: 10.1109/soic.2001.958004

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0.15 μm SOI DRAM technology incorporating sub-volt dynamic threshold devices for embedded mixed-signal & RF circuits

D. Goldman

K. DeGregorio²,

C.S. Kim³

et al.

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0.15 μm SOI DRAM technology incorporating sub-volt dynamic threshold devices for embedded mixed-signal & RF circuits

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