In this paper, a physical SBT memristor-based chaotic circuit is presented. The circuit dynamic behavior of dependence on the initial state of the SBT memristor and a key circuit parameter are investigated by theoretical analyses and numerical simulations. The results indicate that different initial states of the SBT memristor and the key circuit parameter can significantly impact the dynamic behavior of the chaotic circuit, such as stable sink, periodic cycle, chaos, and even some complex transient dynamics. It can guide future research on the realization of chaotic circuit based on physical SBT memristor.
A physical Sr0.95Ba0.05TiO3 memristor-based modified Chua’s circuit is proposed, which is studied in this paper by means of both theoretical analysis and numerical simulations. The stability of this memristor-based modified Chua’s circuit is analyzed. A systematic investigation of the dynamic behaviors and their dependence on the initial states and circuit parameters is performed, presenting the Lyapunov exponents spectra, bifurcation diagrams, phase diagrams, and Poincaré maps. The circuit emerges multiple dynamic behaviors, including stable points, periodic cycles, chaos, and some transient chaos. Specifically, the system has multistability, i.e., coexisting periods and coexisting chaotic attractors with the change of initial states and circuit parameters. This study is conducive to the subsequent design and analysis of memristor-based circuits for potential practical applications.
This paper presents a new physical [Formula: see text] (SBT) memristor-based chaotic circuit. The equilibrium point and the stability of the chaotic circuit are analyzed theoretically. This circuit system exhibits multiple dynamics such as stable point, periodic cycle and chaos by means of Lyapunov exponents spectra, bifurcation diagrams, Poincaré maps and phase portraits, when the initial state or the circuit parameter changes. Specially, the circuit system exhibits coexisting multi-dynamics. This study provides insightful guidance for the design and analysis of physical memristor-based circuits.
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