A wideband high-efficiency V-band CMOS power amplifier (PA) is proposed in this paper. Neutralization technique is used to reduce the Miller effect and improve the power gain. A wideband on-chip transformer is used to adjust the transistors' voltage waveform to improve the PAE performance. The PA works from 51 GHz to 64 GHz with 13 GHz absolute bandwidth and 22.6% relative bandwidth. The output power reaches 14.9 dBm with 16.3% peak PAE. The circuit is designed in a 65 nm CMOS technology.
This paper presents a two-stage low noise amplifier (LNA) for 24 GHz automotive radar applications. Compared with traditional common source (CS) stage, the neutralized topology is used to improve the gain and reverse isolation in the first stage. In the second stage, an enhanced neutralized technique is adopted to improve the gain further. The LNA is fabricated by using standard 180-nm CMOS technology and occupies a chip area of 1.0 × 0.8 mm 2. The design realizes a gain of 19.8 dB, a noise figure (NF) of 4.7 dB and an input 1 dB compression point (IP 1dB) of −12 dBm.
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