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The instruction fetch unit (IFU) usually dissipates a considerable portion of total chip power. In traditional IFU architectures, as soon as the fetch address is generated, it needs to be sent to the instruction cache and TLB arrays for instruction fetch. Since limited work can be done by the power-saving logic after the fetch address generation and before the instruction fetch, previous power-saving approaches usually suffer from the unnecessary restrictions from traditional IFU architectures. In this paper, we present CASA, a new power-aware IFU architecture, which effectively reduces the unnecessary restrictions on the power-saving approaches and provides sufficient time and information for the power-saving logic of both instruction cache and TLB. By analyzing, recording, and utilizing the key information of the dynamic instruction flow early in the front-end pipeline, CASA brings the opportunity to maximize the power efficiency and minimize the performance overhead. Compared to the baseline configuration, the leakage and dynamic power of instruction cache is reduced by 89.7% and 64.1% respectively, and the dynamic power of instruction TLB is reduced by 90.2%. Meanwhile the performance degradation in the worst case is only 0.63%. Compared to previous state-of-the-art power-saving approaches, the CASA-based approach saves IFU power more effectively, incurs less performance overhead and achieves better scalability. It is promising that CASA can stimulate further work on architectural solutions to power-efficient IFU designs.

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Thin client is a kind of interactive and graphics device in client/server and browser/server environment, which combines local and remote computing resources. The applications on the thin client (e.g., browsers) often heavily rely on the support of operating system and the functionalities of network and graphics. Hence, traditional performance evaluation methods, such as instrumentation and application-level simulation, cannot help due to their inherent limitation. This paper presents the design and implementation of Unichos, a full system simulator for thin client platform. Unichos models the complete target hardware system in object-oriented structure, and supports the unmodified Linux 2.4 kernel and graphics and network applications. Unichos is the first full system simulator, which focuses on portability for more architectures of thin client platforms by combining the retargetable instruction template and the extensible device model. Finally, we present the Unichos performance under detailed simulation status and introduce two case studies which demonstrate the advantages of Unichos for performance evaluation.