Force microscopy enables a variety of approaches to manipulate and/or modify surfaces. Few of those methods have evolved into advanced probe-based lithographies. Oxidation scanning probe lithography (o-SPL) is the only lithography that enables the direct and resist-less nanoscale patterning of a large variety of materials, from metals to semiconductors; from self-assembled monolayers to biomolecules. Oxidation SPL has also been applied to develop sophisticated electronic and nanomechanical devices such as quantum dots, quantum point contacts, nanowire transistors or mechanical resonators. Here, we review the principles, instrumentation aspects and some device applications of o-SPL. Our focus is to provide a balanced view of the method that introduces the key steps in its evolution, provides some detailed explanations on its fundamentals and presents current trends and applications. To illustrate the capabilities and potential of o-SPL as an alternative lithography we have favored the most recent and updated contributions in nanopatterning and device fabrication.

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The electronic properties of thin layer transition metal dichalcogenides have raised considerable interest in the fabrication of advanced field-effect transistors and ultrasensitive sensors. Downscaling those devices to the nanoscale depends on the development of cost-effective and robust alternative nanolithographies. Here we demonstrate the direct, resist-less and reproducible nanopatterning of tungsten diselenide thin layers. By using oxidation scanning probe lithography (o-SPL) we have generated arrays of dots with a width of 13 nm and periodicity of 40 nm. We have also patterned a point contact of 35 nm and a nanoscale field-effect transistor. The direct and resistless fabrication of WSe2 nanoscale devices by oxidation scanning probe lithography opens a straightforward and reliable method for processing transition metal dichalcogenides materials.

High-resolution lithography often involves thin resist layers which pose a challenge for pattern characterization. Direct evidence that the pattern was well-defined and can be used for device fabrication is provided if a successful pattern transfer is demonstrated. In the case of thermal scanning probe lithography (t-SPL), highest resolutions are achieved for shallow patterns. In this work, we study the transfer reliability and the achievable resolution as a function of applied temperature and force. Pattern transfer was reliable if a pattern depth of more than 3 nm was reached and the walls between the patterned lines were slightly elevated. Using this geometry as a benchmark, we studied the formation of 10–20 nm half-pitch dense lines as a function of the applied force and temperature. We found that the best pattern geometry is obtained at a heater temperature of ∼600 °C, which is below or close to the transition from mechanical indentation to thermal evaporation. At this temperature, there still is considerable plastic deformation of the resist, which leads to a reduction of the pattern depth at tight pitch and therefore limits the achievable resolution. By optimizing patterning conditions, we achieved 11 nm half-pitch dense lines in the HM8006 transfer layer and 14 nm half-pitch dense lines and L-lines in silicon. For the 14 nm half-pitch lines in silicon, we measured a line edge roughness of 2.6 nm (3σ) and a feature size of the patterned walls of 7 nm.

Supercapacitors are being increasingly used as energy storage systems. Graphene, with its huge specific surface area, superior mechanical flexibility and outstanding electrical properties, constitutes an ideal candidate for the next...