It is well known that the subband adaptive system is useful; however, the study of the theoretical analysis of the system does not seem sufficient. the theoretical analysis is problematic because of the structural constraint in which the input to the unknown system is not the same as the input to the adaptive filter. This paper attempts theoretical analysis of the subband adaptive system and proposes a new equivalent model that removes the foregoing constraint. Then the theory of the Wiener filter is applied to the equivalent model. the optimal ADF coefficient and the least‐mean‐square error (LMSE) in the subband adaptive system are theoretically derived. Lastly, the derived theoretical value is compared to the results of the experiment and the effectiveness of the proposed model and the theoretical expression are demonstated.
Infinitely high selective inductively coupled plasma etching of an indium tin oxide binary mask structure for extreme ultraviolet lithographyThe effects of oxygen plasma on the chemical composition and morphology of the Ru capping layer of the extreme ultraviolet mask blanksThe H 2 plasma treatment for spin-on carbon ͑SOC͒ hard mask in the trilayer resist process is expected to serve as a reliable alternative to single layer resist process for 45 nm nodes and beyond. The authors have investigated this treatment with a view to suppress the deformation of SOC by oxide etching. The wiggling profile of SOC drastically improves due to the formation of a thicker diamondlike amorphous carbon structure by the H 2 plasma treatment with higher-energy hydrogen ions.
The innovative flip chip assembly process with Non Conductive Film (NCF) contributes to high density and reliable 3D/TSV integrations has been developed and demonstrated. The target package had two tier structure which consisted of a logic device and Wide I/O DRAM. The logic device was fabricated by via-middle process and accompanied with 1200 TSVs, a thickness of 50 μm and 40 μm / 50 μm bump pitch layout. Thermalcompression bonding method with Cu pillar was applied to both connections between the memory die and the logic die and between the logic die and an organic substrate so that the high reliability could be achieved. In this work, NCF laminated on substrates was selected as an underfill material to establish robust process for 3D integrations and to realize the cost effective assembly. As reliability test items, 1500-cycle temperature cycling test, 1000h high temperature storage test, 1000h high humidity test, 500h unbiased highly accelerated stress test and 300h pressure cooker test were performed. Furthermore, 28 nm logic device and Wide I/O DRAM were assembled into the 3D structure with this new technology and 12.8 GB/s transmission and 89 % reduction of I/O power compared to LPDDR3 were demonstrated.
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