Insulated gate bipolar transistors (IGBT) short-circuit (SC) protection is one of the most important protection methods for IGBT converter equipment. The fast detection and protection response time could reduce the permanent damage of devices, and extend their use life cycle. At present, the collector emitter voltage v ce desaturation method is widely used in the commercial IGBT drive circuit, which has blanking time of fault detection and protection. In this paper, an improved adaptive v ce SC detection and protection is proposed to realize the blanking time adjustment under different SC conditions. By the determination of the di/dt characteristics of the current variation on the parasitic inductance between the power emitter and the Kelvin emitter of IGBT modules, the execution time of the two detection methods can be set. According to the switch process and the SC type, the corresponding logic processing will be carried out to realize the fast detection of different SC conditions. The circuit scheme without blanking time detection and protection is designed, and the circuit is modelled and simulated by Pspice. The IGBT driving circuit SC test without blanking time detection and soft turn-off protection has been carried out. Simulation and test results can verify the feasibility of the proposed circuit. This is an open access article under the terms of the Creative Commons Attribution License, which permits use, distribution and reproduction in any medium, provided the original work is properly cited.
Insulated-gate bipolar transistors (IGBTs) always operate in parallel for a large output current in modern high-power converter design. Suppressing dynamic current imbalance of the paralleled IGBTs is crucial for stable operation of converters. Though dynamic current imbalance could be suppressed by the symmetrical power loop design and consistent control signal, there is an inherent parameter difference in the power loop or gate circuit caused by the practical factors such as materials, physical dimensions and installation methods. The inherent difference could be compensated with gate delay control in a certain degree. The voltage and current in the key dynamic phases of IGBT are analyzed to obtain the delay compensation in gate delay control. An asynchronous gate signal driving method based on reference signal selections is proposed to suppress dynamic imbalance of collector current from parallel connected IGBTs, and the implementation of the asynchronous drive is described in brief. By using simulation software, the delay settings and dynamic current imbalance under different parameters discrepancy of drive circuit are obtained. The delay difference from key dynamic phases is calculated as the compensation for balanced dynamic current sharing under two selections of reference signals. Furthermore, the dynamic current distribution in the turn-on and turn-off phases is compensated by the asynchronous drive control. The optimization of asynchronous drive method on dynamic current sharing of paralleled IGBTs is verified by comparing dynamic current imbalance between the system with compensation and the system without compensation.
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