(2010) 'Self-catalyzed, pure zincblende GaAs nanowires grown on Si (111) Additional information: Use policyThe full-text may be used and/or reproduced, and given to third parties in any format or medium, without prior permission or charge, for personal research or study, educational, or not-for-prot purposes provided that:• a full bibliographic reference is made to the original source • a link is made to the metadata record in DRO • the full-text is not changed in any way The full-text must not be sold in any format or medium without the formal permission of the copyright holders.Please consult the full DRO policy for further details. We report on the Au-free molecular beam epitaxy growth of coherent GaAs nanowires directly on Si͑111͒ substrates. The growth is catalyzed by liquid Ga droplets formed in the openings of a native oxide layer at the initial growth stage. Transmission electron microscopy studies demonstrate that the nanowires are single crystals having the zincblende structure along their length ͑apart from a thin wurtzite region directly below the Ga droplet͒, regardless of their diameter ͑70-80 nm͒ and the growth temperature range ͑560-630°C͒. We attribute the observed phase purity to a much lower surface energy of liquid Ga than that of Au-Ga alloys, which makes triple line nucleation energetically unfavorable. The change in growth catalyst to a liquid metal with a lower energy suppresses the ͑more usual͒ formation of wurtzite nuclei on surface energetic grounds. These results can provide a distinct method for the fabrication of chemically pure and stacking-fault-free zincblende nanowires of III-V compounds on silicon.

Four different types of solar cells prepared in different laboratories have been characterized by impedance spectroscopy (IS): thin-film CdS/CdTe devices, an extremely thin absorber (eta) solar cell made with microporous TiO2/In(OH)xSy/PbS/PEDOT, an eta-solar cell of nanowire ZnO/CdSe/CuSCN, and a solid-state dye-sensitized solar cell (DSSC) with Spiro-OMeTAD as the transparent hole conductor. A negative capacitance behavior has been observed in all of them at high forward bias, independent of material type (organic and inorganic), configuration, and geometry of the cells studied. The experiments suggest a universality of the underlying phenomenon giving rise to this effect in a broad range of solar cell devices. An equivalent circuit model is suggested to explain the impedance and capacitance spectra, with an inductive recombination pathway that is activated at forward bias. The deleterious effect of negative capacitance on the device performance is discussed, by comparison of the results obtained for a conventional monocrystalline Si solar cell showing the positive chemical capacitance expected in the ideal IS model of a solar cell.

A detailed study of electric and structural properties has been carried out on CdTe/CdS solar cells which deliberately were not subjected to etching by a nitric-phosphoric (NP) or bromine-methanol (Br-Me) acids, conventionally employed for the formation of Te-rich layer before back contacting. In the previous work [J. Appl. Phys. 101, 014505 (2007)] we have shown that cells that were not etched provide more extensive information on sample/material properties than the etched ones, as analyzed by admittance spectroscopy. Although seemingly being able to describe the distribution of defect energy levels, the admittance spectroscopy approach has a significant drawback because the underlying theoretical formulation does not take into account the frequency-dependent contribution from the back contact together with its influence on the trap contributions. In this work we use an alternative methodology for analysis of impedance data measured in dark conditions, which applies an equivalent circuit model to the experimental spectra. In particular, a complete model consisting of 10–12 elements is suggested, which describes all the sets of data taken at different temperatures, unambiguously separating the respective roles of p-n junction parameters, defect trap levels, back contact, as well as spatial inhomogeneities within the cell. It is essential that the values of the parameters used to describe ac response from trap levels and that from the back contact are found to be consistent with admittance and I-V measurements. In addition, the temperature dependence of the dark conductance (GJ) and capacitance (CJ) of the main p-n junction, as well as temperature dependence of back contact resistance (RB), were obtained and analyzed. It was found that GJ(T) follows exp(T/T0) behavior which is characteristic of temperature-assisted tunneling, while CJ(T) agrees well with values of the high-frequency capacitance of the cell CHF(T). The T dependence of RB is found to follow activation behavior defined by a Schottky barrier with a height of (0.545±0.015) eV, that being close to the value obtained from dark I-V measurements.

a b s t r a c tA method to control the grain size of CdTe thin films deposited by close space sublimation using chamber pressure is demonstrated. Grain diameter is shown to increase in the pressure range 2-200 Torr, following the linear relationship D (mm) =0.027 Â P (Torr) +0.90. A mechanism is proposed to explain the dominance of the 111 preferred orientation in the small-grained, but not the largegrained films. For a series of CdTe/CdS solar cells in which the only variable was grain size, the performance parameters were seen to increase from 0.54% (0.94 mm grains) up to a plateau of 11.3% (Z 3.6 mm grains). This corresponds to the point at which the series resistance is no longer dominated by grain boundaries, but by the contacts.

The electrical properties of CdTe/CdS solar cells grown by metal organic chemical vapor deposition were investigated by a technique of impedance measurements under varied intensity of AM1.5 illumination. A generalized impedance model was developed and applied to a series of CdTe/CdS cells with variations in structure and doping. The light measurements were compared to the conventional ac measurements in dark under varied dc bias, using the same methodology for equivalent circuit analysis in both cases. Detailed information on the properties of the device structure was obtained, including the properties of the main p-n junction under light, minority carrier lifetime, back contact, as well as the effect of the blocking ZnO layer incorporated between the transparent conductor and CdS layers. In particular, the comparison between samples with different chemical concentrations of As has shown that the total device impedance and the series resistance are strongly increased at lower As densities, resulting in the lower collection current and efficiencies. At the same time the minority carrier lifetime was found to be one order of magnitude larger for the lowest value of As density, when compared to the optimized devices.