Plastic ball grid array packages wcre aged at 125 and 150 "C for different time intervals from 4 to 2000 honrs. Various solder ball pad metallurgy including purc Ni barrier layer (electrolytic plating) with Au protective layer from 0.48 to 1.27 pin, Ni-P barrier layer (electroless plating) with 0.48 pm Au protective layer atid Ni-Co barrier layer with Au layer from 0.52 to 1.46 gin were studied.
1572000 Electronic Components and Technology Conlerence
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In this paper, a thermal analysis of thermoelectric coolers (TECs) is conducted for processors based on TEC module parameters. Two sets of analytical solutions for TECs in system constraints are derived for the junction temperature Tj at a fixed power Qc, and for Qc at fixed Tj, respectively. The major advantage of the present models lies in the fact that the solutions can be obtained based on the module parameters without prior knowledge of pellet details and iterative solution procedure, as often reported in literature. Two cooling scenarios, the processor test and the processor cooling under end-user conditions, are analyzed based on the present analysis models for two commercial TECs with high power capacities. Results show that significant thermal enhancements are achievable based on optimized current and power dissipation. The validation is also conducted through experimental measurements and comparison with previous iterative solutions.
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