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Suicidal ideation is high among patients with gynecological cancer, especially among ovarian cancer patients. Coping strategies such as confrontation and avoidance, and social support may be helpful for preventing suicidal ideation among them.

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Natural and man-made disasters have been increasing and affecting millions of people throughout the world. Floods are the most common natural disasters affecting more people across the globe than all other natural or technological disasters and also are the most costly in terms of human hardship and economic loss. In order to explore the total economic loss, components of economic loss, and factors influencing economic loss during flooding, a retrospective study was carried out in year 2000 in areas that suffered floods in 1998 in Hunan province, China. A total of 10,722 families were investigated using a multistage sampling method. We found that the total economic loss to the 10,722 families investigated was US$ 8.925 million; translating into an average economic loss of US$ 832.45 per family and US$ 216.75 per person. Economic loss related to property loss, income loss, and increased medical cost accounted for 57.38%, 40.00%, and 2.62% of the total economic loss, respectively. Economic loss was significantly related to a family's pre-flood income; duration of the flood; severity of flood; and type of flood. River floods yielded the highest economic loss and drainage problem floods yielded the lowest loss. We recommended that flood-related preventive measures should focus on the prevention of river floods and shortening the duration of floods with the view of significantly minimizing economic losses associated with floods.

High-performance PMOSFETs with sub-50-nm gate-length are reported. A self-aligned double-gate MOSFET structure (FinFET) is used to suppress the short-channel effects. This vertical double-gate SOI MOSFET features: 1) a transistor channel which is formed on the vertical surfaces of an ultrathin Si fin and controlled by gate electrodes formed on both sides of the fin; 2) two gates which are self-aligned to each other and to the source/drain (S/D) regions; 3) raised S/D regions; and 4) a short (50 nm) Si fin to maintain quasi-planar topology for ease of fabrication. The 45-nm gate-length p-channel FinFET showed an dsat of 820 A/ m at ds = gs = 1 2 V and ox = 2 5nm. Devices showed good performance down to a gate-length of 18 nm. Excellent short-channel behavior was observed. The fin thickness (corresponding to twice the body thickness) is found to be critical for suppressing the short-channel effects. Simulations indicate that the FinFET structure can work down to 10 nm gate length. Thus, the FinFET is a very promising structure for scaling CMOS beyond 50 nm.

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