Tin dioxide (SnO) has been demonstrated as an effective electron-transporting layer (ETL) for attaining high-performance perovskite solar cells (PSCs). However, the numerous trap states in low-temperature solution processed SnO will reduce the PSCs performance and result in serious hysteresis. Here, we report a strategy to improve the electronic properties in SnO through a facile treatment of the films with adding a small amount of graphene quantum dots (GQDs). We demonstrate that the photogenerated electrons in GQDs can transfer to the conduction band of SnO. The transferred electrons from the GQDs will effectively fill the electron traps as well as improve the conductivity of SnO, which is beneficial for improving the electron extraction efficiency and reducing the recombination at the ETLs/perovskite interface. The device fabricated with SnO:GQDs could reach an average power conversion efficiency (PCE) of 19.2 ± 1.0% and a highest steady-state PCE of 20.23% with very little hysteresis. Our study provides an effective way to enhance the performance of perovskite solar cells through improving the electronic properties of SnO.

No abstract

Inkjet printing method is one of the most effective ways for fabricating large-area perovskite solar cells (PSCs). However, because ink crystallizes rapidly during printing, the printed perovskite film is discontinuous with increasing defects. It severely restricts the application of the inkjet printing technology to the fabrication of perovskite photovoltaic devices. Here, we designed a new mixed-cation perovskite ink system that can controllably retard the crystallization rate of perovskite. In this new ink system, the printing solvent is composed of n-methyl pyrrolidone (NMP) and dimethyl formamide (DMF), and PbX2 is replaced by PbX2-DMSO (X = Br, I) complex as a printing precursor to create a high-quality perovskite layer. Accordingly, the printed Cs0.05MA0.14FA0.81PbI2.55Br0.45 perovskite film exhibited high homogeneity with a large grain size (over 500 nm). Besides, the printed perovskite film possessed lower defects with improved carrier lifetime compared to the control sample. Combining these advantages, the printed PSC delivers decent power conversion efficiencies (PCEs) of 19.6% (0.04 cm2) and 17.9% (1.01 cm2). The large-area device can still retain its original efficiency of 89% when stored in air with humidity less than 20% for 1000 h.

PSS hinders the power conversion efficiency (PCE) in comparison with those of traditional p-n junction. Here, a strong inversion layer was formed on n-Si surface by inserting a layer of 1, 4, 5, 8, 9, 11-hexaazatriphenylene hexacarbonitrile (HAT-CN), resulting in a quasi p-n junction. External quantum efficiency spectra, capacitance-voltage, transient photovoltage decay and minority charge carriers life mapping measurements indicated that a quasi p-n junction was built due to the strong inversion effect, resulting in a high Φb and Vbi. The quasi p-n junction located on the front surface region of silicon substrates improved the short wavelength light conversion into photocurrent. In addition, a derivative perylene diimide (PDIN) layer between rear side of silicon and aluminum cathodes was used to block the holes from flowing to cathodes. As a result, the device with PDIN layer also improved photoresponse at longer wavelength. A champion PCE of 14.14% was achieved for the nanostructured silicon-organic device by combining HAT-CN and PDIN layers. The low temperature and simple device structure with quasi p-n junction promises cost-effective high performance photovoltaic techniques.

To fabricate graphene based electronic and optoelectronic devices, it is highly desirable to develop a variety of metal‐catalyst free chemical vapor deposition (CVD) techniques for direct synthesis of graphene on dielectric and semiconducting substrates. This will help to avoid metallic impurities, high costs, time consuming processes, and defect‐inducing graphene transfer processes. Direct CVD growth of graphene on dielectric substrates is usually difficult to accomplish due to their low surface energy. However, a low‐temperature plasma enhanced CVD technique could help to solve this problem. Here, the recent progress of metal‐catalyst free direct CVD growth of graphene on technologically important dielectric (SiO2, ZrO2, HfO2, h‐BN, Al2O3, Si3N4, quartz, MgO, SrTiO3, TiO2, etc.) and semiconducting (Si, Ge, GaN, and SiC) substrates is reviewed. High and low temperature direct CVD growth of graphene on these substrates including growth mechanism and morphology is discussed. Detailed discussions are also presented for Si and Ge substrates, which are necessary for next generation graphene/Si/Ge based hybrid electronic devices. Finally, the technology development of the metal‐catalyst free direct CVD growth of graphene on these substrates is concluded, with future outlooks.

No abstract

Low-quality silicon such as upgraded metallurgical-grade (UMG) silicon promises to reduce the material requirements for high-performance cost-effective photovoltaics. So far, however, UMG silicon currently exhibits the short diffusion length and serious charge recombination associated with high impurity levels, which hinders the performance of solar cells. Here, we used a metal-assisted chemical etching (MACE) method to partially upgrade the UMG silicon surface. The silicon was etched into a nanostructured one by the MACE process, associated with removing impurities on the surface. Meanwhile, nanostructured forms of UMG silicon can benefit improved light harvesting with thin substrates, which can relax the requirement of material purity for high photovoltaic performance. In order to suppress the large surface recombination due to increased surface area of nanostructured UMG silicon, a post chemical treatment was used to decrease the surface area. A solution-processed conjugated polymer of poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate) (PEDOT:PSS) was deposited on UMG silicon at low temperature (<150 °C) to form a heterojunction to avoid any impurity diffusion in the silicon substrate. By optimizing the thickness of silicon and suppressing the charge recombination at the interface between thin UMG silicon/PEDOT:PSS, we are able to achieve 12.0%-efficient organic-inorganic hybrid solar cells, which are higher than analogous UMG silicon devices. We show that the modified UMG silicon surface can increase the minority carrier lifetime because of reduced impurity and surface area. Our results suggest a design rule for an efficient silicon solar cell with low-quality silicon absorbers.

No abstract