A novel edge voltage (EV) quantizer with digital-intensive implementation is proposed to detect DC voltage, peak-to-peak magnitude, and frequency of low-frequency simple waveforms (e.g. sinusoidal). The proposed EV quantizer does not need the area-consuming low pass filter. It can be implemented using digital-intensive circuits with little computing complexity, thanks to the simple detection algorithm. A successive approximation register (SAR) version of the EV quantizer was integrated in a monolithic satellite low noise block (LNB) IC in a 65 nm CMOS process to detect low-frequency control signals. And the measurement results validate that the EV quantizer enables low-cost operation for detection of lowfrequency simple waveforms. Fig. 9. Block diagram of the SAR EV quantizer inside LNB IC.
A programmable gain amplifier (PGA) with DC-offset cancellation (DCOC) and I/Q gain and phase mismatch calibration is proposed in this paper. It achieves a gain tuning range of 9dB to 27dB with 6dB per step and a 30MHz bandwidth. DC negative feedback technique is adopted in the design of DCOC, while the gain mismatch calibration can be implemented in the first stage of PGA using variable resistor calibration and the phase mismatch calibration can be implemented in the second stage of PGA using feed through resistor calibration. Designed and simulated in a 0.18um CMOS process, the proposed PGA has a DC gain of -1dB, and after mismatch calibration, it has a gain error less than 0.1dB and a phase error less than 0.25 deg between I and Q.
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