Optical logic gates are elementary components for optical network and optical computing. In this paper, we propose a structure for AND, NAND, XNOR and NOR logic gates in the two dimensional photonic crystal which utilizes the dispersion based self-collimation effect. The self-collimated beam is splitted by the line defect and interfered with other self-collimated beam. This interference may be constructive or destructive based on their phase difference. This phenomenon is employed to realize all-optical logic gates. The gates are demonstrated numerically by computing electromagnetic field distribution using the finite difference time domain (FDTD) method. The results ensure that this design can function as AND, NAND, XNOR and NOR logic gates. The size of the structure is about 10 μm×10 μm which in turn results in an increase in the speed and all the gates are realized in the same configuration. The ON-OFF contrast ratio is about 6 dB.
This paper proposes novel carry select and carry look-ahead BCD adders using reversible logic. Reversible logic gates are widely known to be compatible with future computing technologies which virtually dissipate zero heat. Adders are fundamental building blocks in many computational units. For this reason, we have simulated several adder circuits using the reversible gates. Among all the other adders, the main virtue of BCD adders is that it allows easy conversion to decimal digits for printing or display and faster decimal calculations. These reversible BCD circuits are basis of the decimal ALU of primitive Quantum CPU. The proposed BCD adders have been simulated in VLSI and static timing report was analyzed.
Design and simulation of novel all-optical fundamental X-NOR and NAND logic gates based on two dimensional photonic crystals are reported in this paper. In a photonic crystal self collimated beams are partially transmitted and partially reflected with a phase lag at a line defect in -X direction. The phase shifter is employed, the reflected and transmitted input beams are interfered constructively or destructively to obtain the required logic outputs. The operations of the logic gates are simulated using two dimensional Finite Difference Time Domain (FDTD) method.
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