A new version of the SIMCON system is presented in this paper. The SIMCON stands for the microwave, resonant, superconductive accelerator cavity simulator and controller (embracing the hardware and software layers). The current version of the SIMCON is 3.1. which is a considerable step forward from the previous 8-channel version 3.0. which was released at the beginning of 2005 and was made operable in April. Many important upgrades were implemented in SIMCON 3.1. It is a stand-alone VME board (whereas SIMCON 3.0 was modular) based on the Virtex II Pro 30 chip with two embedded Power PCs and DSP blocks. It has Ethernet and multiple gigabit optical I/Os. The Simcon 3.1 board provides 10 ADC channels. The architecture idea and block diagrams of the PCB for SIMCON 3.1. are presented. Some of the applied novel technical solutions, Protel® views and schemes are shown. A number of initial conclusions were drawn from a few month experience with the development of this new board. The tables of predicted system parameters are quoted.
The work presents a structural and functional model of a distributed low level radio frequency (LLRF) control system for the TESLA-XFEL accelerator. The design of a system basing on the FPGA chips and multi-gigabit optical network was debated. The system design approach was fully parametric. The major emphasis is put on the methods of the functional and hardware concentration to use fully both: a very big transmission capacity of the optical fiber telemetric channels and very big processing power of the latest series of the, DSP enhanced and optical I/O equipped, FPGA chips. The subject of the work is the design of a universal, laboratory module of the LLRF sub-system. Initial parameters of the system model under the design are presented.
ABSTRACTThe work presents a structural and functional model of a distributed low level radio frequency (LLRF) control system for the TESLA-XFEL accelerator. The design of a system basing on the FPGA chips and multi-gigabit optical network was debated. The system design approach was fully parametric. The major emphasis is put on the methods of the functional and hardware concentration to use fully both: a very big transmission capacity of the optical fiber telemetric channels and very big processing power of the latest series of the, DSP enhanced and optical I/O equipped, FPGA chips. The subject of the work is the design of a universal, laboratory module of the LLRF sub-system. Initial parameters of the system model under the design are presented
The paper describes design, construction and initial measurements of an eight channel electronic LLRF device predicted for building of the control system for the VUV-FEL accelerator at DESY (Hamburg). The device, referred in the paper to as the SIMCON 3.0 (from the SC cavity simulator and controller) consists of a 16 layers, VME size, PCB, a large FPGA chip (VirtexII-4000 by Xilinx), eight fast ADCs and four DACs (by Analog Devices). To our knowledge, the proposed device is the first of this kind for the accelerator technology in which there was achieved (the FPGA based) DSP latency below 200 ns. With the optimized data transmission system, the overall LLRF system latency can be as low as 500 ns. The SIMCON 3.0 sub-system was applied for initial tests with the ACC1 module of the VUV FEL accelerator (eight channels) and with the CHECHIA test stand (single channel), both at the DESY. The promising results with the SIMCON 3.0 encouraged us to enter the design of SIMCON 3.1 possessing 10 measurement and control channels and some additional features to be reported in the next technical note. SIMCON 3.0 is a modular solution, while SIMCON 3.1 will be an integrated board of the all-in-one type. Two design approaches -modular and all-in-one, after branching off in this version of the SIMCON, will be continued.
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