In industrial environments, over several decades, Automated Guided Vehicles (AGVs) and Autonomous Mobile Robots (AMRs) have served to improve efficiencies of intralogistics and material handling tasks. However, for system integrators, the choice and effective deployment of improved, suitable and reliable communication and control technologies for these unmanned vehicles remains a very challenging task. Specifics of communication for AGVs and AMRs imposes stringent performance requirements on latency and reliability of communication links which many existing wireless technologies struggle to satisfy. In this paper, a review of latest AGVs and AMRs research results in the past decade is presented. The review encompasses results from different past and present research domains of AGVs. In addition, performance requirements of communication networks in terms of their latencies and reliabilities when they are deployed for AGVs and AMRs coordination, control and fleet management in smart manufacturing environments are discussed. Integration challenges and limitations of present state-of-the-art AGV and AMR technologies when those technologies are used for facilitating AGV-based smart manufacturing and factory of the future applications are also thoroughly discussed. The paper also present a thorough discussion of areas in need of further research regarding the application of 5G networks for AGVs and AMRs fleet management in smart manufacturing environments. In addition, novel integration ideas by which tactile Internet, 5G network slicing and virtual reality applications can be used to facilitate AGV and AMR based factory of the future (FoF) and smart manufacturing applications were motivated.INDEX TERMS Intelligent factory, factory of the future, 5G, smart manufacturing, industry 4.0, autonomous industrial equipment, AGV, AMR, tactile Internet, virtual reality, lean manufacturing.

For high density interconnection IC packages of the future, the outlook is for thinner packages with higher routing densities. With that, managing the substrate warpage becomes critical. Traditional organic substrates may face several challenges for high density I/Os with very fine line interconnections. Glass is one of the candidates that can be used in substrate industry. The infrastructure of glass for LCD industry has already been developed for many years. Glass also has several superior properties than other substrate candidates, such as large panel size availability, adjustable CTE, high modulus, low dielectric constant, low dielectric loss and high insulating ability. In this paper, we successfully demonstrate early manufacturing feasibility of glass substrate with 4 build-up layers starting with a thin glass panel of thickness of 200μm in 508mm μ 508mm panel size format and under the IC substrate manufacturing environment. Fabrication and electrical results of a test vehicle are documented. The test vehicle includes daisy chains that are connected with 100μm diameter through glass via (TGV) in a 200μm thick glass. The laser via in via technology was adopted for double side electrical connection. The copper line width/space of 8/8μm was demonstrated. The total thickness of 4 layers test vehicle is about 390μm. The warpage of glass in comparison with an organic substrate (BT) with 200μm core thickness is 3X better. Further work is needed to develop, fine tune and assess the detailed manufacturability and reliability concerns. Based on this work, it is clear that the potential of glass in IC packaging and integration is tremendous in diverse applications for substrate warpage enhancement.

High quality and compact RF devices, using the half mode substrate integrated waveguide (HMSIW) architecture loaded with a complementary split ring resonator (CSRR), are implemented on a glass interposer layer, which therefore serves as an interconnection layer and as a host medium for integrated passive RF components. Compared with the silicon interposer approach, which suffers from large electrical conductivity and therefore substrate loss, the glass interposer has advantages of low substrate loss, allowing high quality interconnection and passive circuits, and low material and manufacturing costs. Corning fusion glass is selected as the substrate to realize the compact CSRR-loaded HMSIW resonators and bandpass filters (BPFs) working under the principle of evanescent wave amplification. Two and three pole bandpass filters are designed for broadband operation at 5.8 GHz. Thru glass vias (TGVs) are used to define the side-wall of the substrate integrated waveguiding structure. Surface micromachining techniques are used to fabricate the proposed devices. The variations of the external quality factor (Qe) of the resonator and the internal coupling coefficient (M) of the coupled resonators are studied for filter design. Operation of the filters at 5.8 GHz with a fractional bandwidth (FBW) of more than 10% for an in-band return loss of better than 20 dB and an low insertion loss of less than 1.35 dB has been obtained, which is not feasible with a usual Si interposer approach. Measurement results are presented from 2 to 10 GHz and show good agreement with simulated ones. IntroductionThe through-glass interposer (TGI) technology rapidly grows up as a promising alternative to the through-silicon interposer (TSI) because of its low substrate loss in the RF/microwave range, the mechanical robustness and low material and manufacturing cost [1][2][3]. Also, recent advancement on the corning fusion process for pristine surface glass substrates and through glass via (TGV) processes including wet and dry etching, laser drilling, and W-plug [1], have made the glass interposer much viable in the market. Previously, we have reported the high frequency characterization of Corning glass using a ring resonator, as well as the modeling of high frequency TGV using Corning glasses [4]. High quality factor (Q-factor) radiofrequency (RF) performance of the resonator has implicated the glass interposer can be a good hosting medium for high quality RF circuits, i.e. bandpass filters (BPF), supporting modern devices required for system on package (SoP) and system on chip (SoC) technologies [5,6].It is known that during the years BPFs for wireless systems have used the waveguide, microstrip and coplanar waveguide

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Glass carriers have proven to provide a solution for carriers during wafer thinning operations for 3D-IC (Three-Dimensional Integrated Circuit). The attributes of the glass carrier, such as total thickness variation (TTV), flatness and properties such as coefficient of thermal expansion (CTE), are extremely important in their functional performance. Optimization of Corning's fusion forming process gives a platform that is very well suited to generate high precision glass carriers. This process provides glass at target thickness (no grind/polish required) with a pristine surface, extremely tight TTV, low warp/bow, and thickness tolerance over large volumes of material. Given that this material is formed in sheets as large as three meters in size, there is tremendous flexibility in the size of the wafers; as well as ability to scale to high volume manufacturing in a cost effective way. Furthermore, the ability to alter glass composition provides the opportunity to optimize material properties, such as CTE. This is important to accommodate the needs of various device structures which require thinning. Non-uniformities (TTV, flatness) in the carrier directly impact the accuracy of the thinned wafer TTV. As important as the low TTV and warp/bow provided by Corning's optimized fusion process, is the method in which these attributes are characterized. Corning ® Tropel ® has developed a novel distance measuring interferometer based on a frequency stepping laser that is well-suited to characterize the flatness and TTV of glass wafers. The work presented here will highlight the importance of high precision carriers and metrology techniques used to characterize and qualify these materials. The impact these have on the TTV of a bonded stack is just as critical. The ability to leverage all of these tools to provide bonded stacks with extremely low TTV and highly uniform silicon wafers after thinning operations will be demonstrated.