Development of highly reliable and available systems requires consideration of the occurrence of single event upsets, the effects they have on system performance, and strategies for their prevention and mitigation. Methods of systems engineering process and the application and validation of techniques for fault tolerance are discussed as elements in the elimination and mitigation of single event upsets.
Use of a systems engineering process and the application of techniques and methods of fault tolerant systems are applicable to the development of a mitigation strategy for Single Event Upsets (SEU). Specific methods of fault avoidance, fault masking, detection, containment, and recovery techniques are important elements in the mitigation of single event upsets. Fault avoidance through the use of SEU hardened technology, fault masking using coding and redundancy provisions, and solutions applied at the subsystem and system level are available to the system developer. Validation and verification of SEU mitigation and performance of fault tolerance provisions are essential elements of systems design for operation in energetic particle environments.
The complex single-event upset (SEU) signatures produced by high-speed analog-to-digital converter devices are analyzed to establish magnitude, duration, and pattern characteristics. Histograms and other descriptive summaries of event characteristics are identified and their use in performing system effects analysis is described.
High energy particle measurements and analysis were performed on innovative Actel RTSX FPGA targets specifically designed, programmed, and operated representing realistic flight personalities. Results indicate these devices are suitable for space use following adequate application design and analysis.
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