Asynchronous pipeline structure is adopted for the real-time video decoder design because of its better performance when the stage processing times are irregular. However, the structure requires a lot of memories, the invaluable resource on chip, to buffer data and parameters between modules. To solve this problem, a specially designed switching buffer module is used between stages instead of traditional FIFO, and the module can also take some buffering function in each stage, which helps to reduce the utilization of memory. An H.264 decoder with the proposed structure was implemented. Compared to decoder without improved structure, the experimental decoder can save nearly 50% memory and 31% I/O operations between stages.
To make rapid implementation and verification for the systems becomes important in frontend Application Specific Integrated Circuits. Therefore, a field programmable gate array based hardware/software codesign prototyping environment is proposed to simulate the software implementation and verify the hardware implementation of a baseband OFDM system. The system is implemented by software and hardware partitions, respectively. The analog radio frequency front-end module helps take a full insight into the actual baseband system performance. User datagram protocol is used for data transmission between these two partitions, and hence makes a complete baseband system. With the proposed codesign environment, the software simulation is running over real wireless channels, and the hardware implemental results can be flexibly processed in real time and enhances the design efficiency.
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