The authors have measured the electrical properties of metal insulator semiconductor capacitors of GaAs, with ex situ jet-vapor-deposited Si3N4 as a gate dielectric. Unpinning of GaAs surface was demonstrated by ac conductance and capacitance-voltage (C-V) measurement; GaAs surface inversion has been demonstrated by quasistatic C-V and hysteresis C-V measurements. Hydrogen plasma predeposition treatment at 200°C has been shown to reduce interface-state density. The lowest interface-state density that the authors measured was 9×1011∕cm2∕eV at 0.57eV above EV for p-type GaAs, and the smallest hysteresis window was 100mV.
We report n-channel enhancement-mode GaAs metal-insulator-semiconductor Field Effect Transistors (MISFETs) with ∼6nm equivalent oxide thickness of molecular-and-atomic (MAD) depositioned Si3N4 as the gate dielectric. The GaAs based MISFETs were fabricated using a gate-first process that preserved the channel inversion characteristic in MIS capacitor structures [W. P. Li, X. W. Wang, Y. X. Liu, and T. P. Ma, Appl. Phys. Lett. 90, 193503 (2007)]. The channel inversion characteristics of the GaAs MIS capacitors, measured by the quasistatic C-V (capacitor-voltage) technique, were well maintained throughout the entire fabrication process with temperatures up to 800°C. C-V hysteresis as small as 100mV was achieved. The Si3N4-gated GaAs MISFETs clearly demonstrated the enhancement-mode, gate-modulated Id-Vd transfer characteristics with channel inversion.
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