Abstract-The smart building, as an application of the cyberphysical systems (CPSs), plays an important role in everyday lives of people. Thermal comfort and energy efficiency are primary goals for HVAC systems in smart buildings. Since the controllers of the HVACs heavily rely on data of sensors that are deployed in the buildings, temporary or permanent sensor faults may lead to increased energy consumption or decreased thermal comfort far below expectations. In this paper, we examine sensor data faults observed in the real-world sensor deployments, and their effects on thermal comfort and energy efficiency in multi-room buildings. The read-back and nearest neighbor monitoring approaches are proposed considering temporal and spatial correlations between data of sensors to mitigate the faults of interest. We adopt a model-based design methodology for the multi-room building as a CPS application and develop reusable system models in the MATLAB/Simulink environment. We conclude that the aforementioned faults may significantly reduce energy efficiency and thermal comfort unless mitigated. The proposed approaches improved thermal comfort by up to 75% for the room where the faulty sensor was deployed and reduced total energy consumption by up to 38%.
This paper presents an analysis framework for correct system operation (i.e. system success) of Cyber-Physical Systems (CPS) that deploy binary sensors with possible faults. We discuss potential faults in the interface part of such systems and address solutions for those faults in order to build dependable and reliable CPS applications. As a practical tool, we present a set of models in SIMULINK to help system designers extend simulations of general CPS applications that deploy binary sensor networks. We provide methodologies to add well-defined fault behaviors and offer assessment tools to measure the effects of possible faults on the overall system success. We demonstrate the feasibility of our contributions using a CPS application and explore various architectures for fault mitigation in a holistic design space exploration environment. With the ability to help system designers analyze and assess a non-trivial design space, the presented approach contributes to the design of fault-tolerant CPSs.
The demand for compute cycles needed by embedded systems is rapidly increasing. Due to the limitations of single-core processors, a move towards multi-core architectures is unavoidable. In this paper, we introduce the XGRID embedded many-core system-on-chip architecture. XGRID makes use of a novel, FPGA-like, programmable interconnect infrastructure, offering scalability and deterministic communication using hardware supported message passing among cores. We have developed a simulation framework for the XGRID architecture, which provides system performance information. Our experiments with XGRID are very encouraging. A number of parallel benchmarks are evaluated on the XGRID processor using the application mapping technique described in this work. Results show an average of 5X speedup, a maximum of 14X speedup, and a minimum of 2X speedup across all benchmarks. We have validated our scalability claim by running our benchmarks on XGRID varying in core count. We have also validated our assertions on XGRID architecture by comparing XGRID against the Graphite many-core architecture and have shown that XGRID outperforms Graphite in performance.
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