No abstract

A low-power interferer-robust mixer-first receiver front-end that uses a novel capacitive stacking technique in a bottom-plate N-path filter/mixer is proposed. Capacitive stacking is achieved by reading out the voltage from the bottom-plate of N-path capacitors instead of their top-plate, which provides a 2x voltage gain after down-conversion. A step-up transformer is used to improve the out-of-band (OOB) linearity performance of small switches in the N-path mixer, thereby reducing the power consumption of switch drivers. This paper explains the concept of implicit capacitive stacking and analyzes its transfer characteristics. A prototype chip, fabricated in 22 nm FDSOI technology, achieves a voltage gain of 13 dB and OOB IIP3/IIP2 of +25/+66 dBm with 5 dB Noise figure while consuming only 600 µW of power at fLO=1 GHz. Thanks to the transformer, the prototype can operate in the input frequency range of 0.6-1.2 GHz with more than 10 dB voltage gain and 5-9 dB Noise figure. Thus it opens up the possibility of low-power software defined radios.

This paper presents an energy-/area-efficient digitally controlled oscillator (DCO)-based phase-tracking Receiver for Internet-of-Things (IoT) applications. The RX leverages the constant-envelope nature of frequency shift keying modulation adopted in many IoT protocols, e.g., IEEE802.15.4 and Bluetooth low energy (BLE), to enhance the energy efficiency and to reduce the chip area. The proposed RX, with the DCO acting as a local oscillator (LO) and binary frequency feedback, promotes low-power and low-voltage circuit design, while a dataaided carrier-frequency tracking ensures the received carrier stability without a power-/area-hungry phase-locked loop (PLL). The RX avoids a compromise between a power-hungry I/Q LO generation and the image rejection in traditional RXs. An equivalent mathematical model is further presented, which helps to analyze and optimize the frequency response of the proposed RX. Fabricated in 40-nm CMOS, the RX consumes 1.55 mW from a 0.85-V supply and has a −87-dBm sensitivity at 2 Mb/s, which leads to a 0.77-nJ/b energy efficiency and 178-dB RX sensitivity FoM.

This paper presents a sub-mW mixer-first RF front-end that exploits a novel capacitive stacking technique in an altered bottom-plate N-path filter/mixer to achieve passive voltage gain and high-linearity at low noise figure. Capacitive stacking is realized implicitly by reading out the voltage from the bottom-plate of N-path capacitors instead of their top-plate, which provides a 2x gain at the read-out capacitors. Additional passive voltage gain is achieved using impedance upconversion while improving the out-of-band linearity performance of small switches. With no other active circuitry, only clock generation circuits determine the total power consumption of this RF frontend. A prototype is fabricated in GF22 nm FDSOI technology. Operating at fLO= 1 GHz, the prototype achieves a voltage gain of 13 dB, 5 dB Noise Figure and +25/+66 dBm Out-of-band IIP3/IIP2 at 160 MHz offset while consuming only 600 µW of power from a 0.8 V supply.

In this article, we present a passive mixer-first receiver front end providing a low-power integrated solution for high interference robustness in radios targeting Internetof-Things (IoT) applications. The receiver front end employs a novel N-path filter/mixer, a linear baseband amplifier, and a step-up transformer to realize sub-6-dB NF and >20-dBm OB-IIP3 concurrently. The proposed N-path filter/mixer exploits an implicit capacitive stacking principle to achieve passive voltage gain of 3 during down-conversion and high out-ofband linearity simultaneously while using at least 2× less total capacitance for the same RF bandwidth compared to a conventional switch-capacitor N-path filter. Fabricated in 22-nm complementary metal-oxide-semiconductor (CMOS) fully depleted silicon on insulator (FDSOI), the receiver prototype-including a 2:6 transformer-occupies only 0.2 mm 2 of active area. Operating in the frequency range of 1.8-2.8 GHz, the front end provides a 45-47-dB conversion gain and a baseband bandwidth of 2 MHz. Due to passive voltage gain in the filter/mixer and transformer, the implemented front end consumes only 1.7-2.5 mW of power to achieve <6-dB NF, ∼24/60/1 dBm out-of-band IIP3/IIP2/B1dB, respectively.