Power dissipation of CMOS circuits becomes more arid inore crucial because of heat, battery and electroniigratiorz problems. I n this paper we describe a logic simulutiori approacli suitable to get information about the dissipated power of a system without the iieed of a specific current simulation. With this approach it ispossible to retrieve estiinarioris for average power dissipatiorz under typical operuting conditions. Furthermore a i~zapping upproach is suggested wiiich performs a power-miizimal mapping fov a giveia CMOS combinatioizal circuit structure.
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