Paper discusses the design of computing node for Mesh topology-based Network on Chip (NoC) platform. The computing node has a capability of processing and routing data over four I/O port switch. Mesh topology is popular due to scalability and its simplest form. The platform is design for (N x N) computing nodes, where each node has soft-core based ‘NIOS-II’ processor. Each computing node has four-way switch East, West, North, South and one local port. The Mesh topology uses static look-up table optimized using proper routing algorithms. The lookup table information is used by Virtual Circuit Interface (VCI) of the switch node to forward the packets using combination of priority based round robin diagonal propagation scheduling algorithm. The design of computing node is generated using – Quartus-II ALTERA software and simulated for functional simulation. Such platforms are popular for data parallelism having applications in Smart sensors.
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