Hot-carrier-induced device degradation of high-voltage p-type lateral diffused metal-oxide semiconductor (LDMOS) transistors is investigated. A two-stage linear region drain current (I Dlin) shift (I Dlin shift increases rapidly at the beginning of stress but tends to saturate when the stress time is longer) is observed. Technology computer-aideddesign simulations and direct current current-voltage measurement results suggest that the decrease of residual fabrication interface traps (N IT) leads to an initial increase in I Dlin shift. On the other hand, two competing mechanisms, i.e. increase in N IT generation and increase in electron trapping, are responsible for the saturated I Dlin shift when the stress time is longer.
scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.