SUMMARYExperimental results on the frequency dispersions of the transconductance (G m ) and the drain conductance (G d ) in ion-implanted gallium arsenide (GaAs) metal-semiconductor field-effect transistors (MESFETs) are analyzed by two-dimensional device simulations. In the experiment, G m exhibits negative frequency dispersion and G d shows positive frequency dispersion in the drain current saturation region, and the activation energy is close to 0.7 eV for both. G m exhibits positive dispersion with an activation energy of 0.42 eV in the linear current region, and no frequency dispersion is observed in G d . Based on the drain voltage conditions of the experiment and the effect of a p-type buffer layer, a simulation assuming traps at 0.42 eV at the surface and 0.71 eV in the substrate has shown that features of the experimental results for G m and G d can be reproduced. These results show that the positive dispersion of G m in the linear region is caused by the surface traps, and the negative dispersion of G m and the positive dispersion of G d in the saturation region by the substrate traps. Through the simulated potential and carrier distribution during the gate or drain transient, we conclude that the positive dispersion of G d is due to the capture delay of electrons by the traps, and the negative dispersion of G m in the saturation region is due to the emission delay of electrons from the substrate traps, which are accumulated by the drain current penetration into the substrate.
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