In this paper the use of a novel feature extraction method oriented to convolutional neural networks (CNN) is discussed in order to solve four-class motor imagery classification problem. Analysis of viable CNN architectures and their influence on the obtained accuracy for the given task is argued. Furthermore, selection of optimal feature map image dimension, filter sizes and other CNN parameters used for network training is investigated. Methods for generating 2D feature maps from 1D feature vectors are presented for commonly used feature types. Initial results show that CNN can achieve high classification accuracy of 68% for the fourclass motor imagery problem with less complex feature extraction techniques. It is shown that optimal accuracy highly depends on feature map dimensions, filter sizes, epoch count and other tunable factors, therefore various fine-tuning techniques must be employed. Experiments show that simple FFT energy map generation techniques are enough to reach the state of the art classification accuracy for common CNN feature map sizes. This work also confirms that CNNs are able to learn a descriptive set of information needed for optimal electroencephalogram (EEG) signal classification.
The increased popularity of brain-computer interfaces (BCIs) has created a new demand for miniaturized and low-cost electroencephalogram (EEG) acquisition devices for entertainment, rehabilitation, and scientific needs. The lack of scientific analysis for such system design, modularity, and unified validation tends to suppress progress in this field and limit supply for new low-cost device availability. To eliminate this problem, this paper presents the design and evaluation of a compact, modular, battery powered, conventional EEG signal acquisition board based on an ADS1298 analog front-end chip. The introduction of this novel, vertically stackable board allows the EEG scaling problem to be solved by effectively reconfiguring hardware for small or more demanding applications. The ability to capture 16 to 64 EEG channels at sample rates from 250 Hz to 1000 Hz and to transfer raw EEG signal over a Bluetooth or Wi-Fi interface was implemented. Furthermore, simple but effective assessment techniques were used for system evaluation. While conducted tests confirm the validity of the system against official datasheet specifications and for real-world applications, the proposed quality verification methods can be further employed for analyzing other similar EEG devices in the future. With 6.59 microvolts peak-to-peak input referred noise and a −97 dB common mode rejection ratio in 0–70 Hz band, the proposed design can be qualified as a low-cost precision cEEG research device.
The increased popularity of brain-computer interfaces (BCIs) has created a new demand for miniaturized and low-cost electroencephalogram (EEG) acquisition devices for entertainment, rehabilitation, and scientific needs. The lack of scientific analysis for such system design, modularity, and unified validation tends to suppress progress in this field and limit supply for new low-cost device availability. To eliminate this problem, this paper presents the design and evaluation of a compact, modular, battery powered, conventional EEG signal acquisition board based on an ADS1298 analog front-end chip. The introduction of this novel, vertically stackable board allows the EEG scaling problem to be solved by effectively reconfiguring hardware for small or more demanding applications. The ability to capture 16 to 64 EEG channels at sample rates from 250 Hz to 1000 Hz and to transfer raw EEG signal over a Bluetooth or Wi-Fi interface was implemented. Furthermore, simple but effective assessment techniques were used for system evaluation. While conducted tests confirm the validity of the system against official datasheet specifications and for real-world applications, the proposed quality verification methods can be further employed for analyzing other similar EEG devices in the future. With 6.59 microvolts peak-to-peak input referred noise and a −97 dB common mode rejection ratio in 0-70 Hz band, the proposed design can be qualified as a low-cost precision cEEG research device.
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