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A high current density of 1 kA/cm2 is experimentally realized in enhancement-mode Ga2O3 vertical power metal-insulator field-effect transistors with fin-shaped channels. Comparative analysis shows that the more than doubled current density over the prior art arises from a larger transistor channel width; on the other hand, a wider channel also leads to a more severe drain-induced barrier lowering therefore premature transistor breakdown at zero gate-source bias. The observation of a higher current density in a wider channel confirms that charge trapping in the gate dielectric limits the effective field-effect mobility in these transistor channels, which is about 2× smaller than the electron mobility in the Ga2O3 drift layer. The tradeoff between output-current density and breakdown voltage also depends on the trap density. With minimal trap states, the output current density should remain high while breakdown voltage increases with decreasing fin-channel width.

This letter describes a new two-step electrode process on p-GaN and characteristics of GaN p-n junction diodes on free-standing GaN substrates with low specific ON-resistance R on and high breakdown voltage V B . We develop a two-step process for anode electrodes in order to avoid plasma damage to the p + -GaN contact layer during the sputtering process. The specific ON-resistance is further improved due to a new low-damage process. The breakdown voltage of the diodes with the field-plate (FP) structure is over 1100 V, and the leakage current was low, i.e., in the range of 10 −9 A. The specific ON-resistance of the diodes of 50 μm in diameter with the FP structure was 0.4 mΩ · cm 2 . Baliga's figure of merit (V 2 B /R on ) of 3.0 GW/cm 2 is obtained. These are the best values ever reported among those achieved by GaN p-n junction diodes on free-standing GaN substrates.Index Terms-Breakdown voltage, gallium nitride, power semiconductor devices.

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A normally-off GaN double-implanted vertical MOSFET (DMOSFET) with an atomic layer deposition (ALD)-Al2O3 gate dielectric film on a free-standing GaN substrate fabricated by triple ion implantation is presented. The DMOSFET was formed with Si ion implanted source regions in a Mg ion implanted p-type base with N ion implanted termination regions. A maximum drain current of 115 mA/mm, maximum transconductance of 19 mS/mm at a drain voltage of 15 V, and a threshold voltage of 3.6 V were obtained for the fabricated DMOSFET with a gate length of 0.4 μm with an estimated p-type base Mg surface concentration of 5 × 1018 cm−3. The difference between calculated and measured Vths could be due to the activation ratio of ion-implanted Mg as well as Fermi level pinning and the interface state density. On-resistance of 9.3 mΩ·cm2 estimated from the linear region was also attained. Blocking voltage at off-state was 213 V. The fully ion implanted GaN DMOSFET is a promising candidate for future high-voltage and high-power applications.

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In this letter, we describe the characteristics of Gallium Nitride (GaN) p–n junction diodes fabricated on free-standing GaN substrates with low specific on-resistance R on and high breakdown voltage V B. The breakdown voltage of the diodes with the field-plate (FP) structure was over 3 kV, and the leakage current was low, i.e., in the range of 10-4 A/cm2. The specific on-resistance of the diodes of 60 µm diameter with the FP structure was 0.9 mΩ·cm2. Baliga's figure of merit (V B 2/R on) of 10 GW/cm2 is obtained. Although a certain number of dislocations were included in the device, these excellent results indicated a definite availability of this material system for power-device applications.