This study presents an interleaved high step-up DC-DC converter based on three-winding high-frequency coupled inductor and voltage multiplier cell (VMC) techniques. The primary and secondary windings of each coupled inductor are inserted in the same phase and the third winding is inserted in the other phase. The VMC in each phase consists of two diodes, two capacitors, the secondary winding of the same phase coupled inductor and the third winding of the other phase coupled inductor. The voltage gain is increased and the output voltage is clamped across the capacitors of the VMCs. Then, the voltage across the power metal oxide semiconductor field effect transistors (MOSFETs) is decreased. The leakage inductance of the coupled inductors controls the output diode falling rate, which alleviates reverse recovery problems. The power MOSFETs are turned-on under zero current switching that helps to conversion efficiency improvement. Three modes of operation named as continuous conduction mode, discontinuous conduction mode and boundary conduction mode are investigated for the proposed converter. The carried mathematical analysis and satisfying operation of the proposed converter are verified via experimental results of an 870 W 60 V-input to 590 V-output laboratory prototype with 95.2% conversion efficiency.
A non-isolated DC-DC converter with high-voltage gain and low-voltage stress across the semiconductors is proposed in this study. The proposed converter consists of n stages of diode-capacitor-inductor (D-C-L) units at the input side and m units of voltage multiplier cells (VMCs) at the output side. Increasing of D-C-L units and VMCs, lead to high-voltage gain at low duty cycle. Lower values of duty cycle will result in increasing of converter controllability and increasing of operation region. Also by increasing of VMCs, the voltage stress across the main switch and other semiconductors is reduced severely. Decreasing of voltage stress across the main switch leads to use a switch with lower R DS-ON that reduces on state losses of the proposed converter. Besides, by decreasing of voltage stress across the diode rectifiers, diodes with less forward voltage drop can be adopted. The circuit performance will be compared with other solutions that were previously proposed for voltage step-up in the terms of voltage gain, main switch voltage stress and number of components. Finally, a 357 V-65.5 W laboratory prototype with 92% conversion efficiency is built in order to prove the satisfying operation of the proposed converter and carried mathematical analysis.
A non-isolated DC-DC converter with high-voltage gain and low-voltage stress on switches is proposed in this study. For absorption of energy n stages of diode-capacitor-inductor (D-C-L) units are used at the input that results in higher voltage gains. Actually, the proposed converter generalises the voltage lift circuit and combines it with a voltage multiplier cell. Therefore comparing to structures with one stage of D-C-L unit, it will be feasible to achieve supposed voltage gain at lower duty cycles. Lower values of duty cycle will result in increasing of converter controllability and increasing of operation region. The generalised analysis of the voltage and current stresses of the semiconductors and power components is carried out. The circuit performance will be compared with other solutions that were previously proposed for voltage step-up in the terms of voltage gain, switch and output diode voltage stress and number of components. The carried mathematical analysis and circuit performance are validated through both simulation and experimental results that match each other reasonably well.
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