Б а с р е д а к т о р ы х. ғ. д., проф., ҚР ҰҒА академигі М. Ж. Жұрынов Р е д а к ц и я а л қ а с ы:Р.Ш. проф. (Ресей) Абишев М.Е. проф., корр.-мүшесі (Қазақстан) Аврамов К.В. проф. (Украина) Аппель Юрген проф. (Германия) Баймуқанов Д.А. проф., корр.-мүшесі (Қазақстан) Байтулин И.О. проф., академик (Қазақстан) Банас Иозеф проф. (Польша) Берсимбаев Р.И. проф., академик (Қазақстан) Велесько С. проф. (Германия) Велихов Е.П. проф., РҒА академигі (Ресей) Гашимзаде Ф. проф., академик (Əзірбайжан) Гончарук В.В. проф., академик (Украина) Давлетов А.Е. проф., корр.-мүшесі (Қазақстан) Джрбашян Р.Т. проф., академик (Армения) Қалимолдаев М.Н. проф., академик (Қазақстан), бас ред. орынбасары Лаверов Н.П. проф., академик РАН (Россия) Лупашку Ф. проф., корр.-мүшесі (Молдова) Мохд Хасан Селамат проф. (Малайзия) Мырхалықов Ж.У. проф., академик (Қазақстан) Новак Изабелла проф. (Польша) Огарь Н.П. проф., корр.-мүшесі (Қазақстан) Полещук О.Х. проф. (Ресей) Поняев А.И. проф. (Ресей) Сагиян А.С. проф., академик (Армения) Сатубалдин С.С. проф., академик (Қазақстан) Таткеева Г.Г. проф., корр.-мүшесі (Қазақстан) Умбетаев И. проф., академик (Қазақстан) Хрипунов Г.С. проф. (Украина) Юлдашбаев Ю.А. проф., РҒА корр-мүшесі (Ресей) Якубова М.М. проф., академик (Тəжікстан) «Қазақстан Республикасы Ұлттық ғылым академиясының Хабаршысы».
In this paper, we consider a schematic solution of the pipeline multiplier modulo, where multiplication begins with the analysis of the lowest order of the polynomial multiplier, which can serve as an operating unit for high-speed encryption and decryption of data by hardware implementation of cryptosystems based on a non-positional polynomial notation. The functional diagram of the pipeline and the structure of its logical blocks, as well as an example of performing the operation of multiplying polynomials modulo, are given. The correct functioning of the developed circuit was checked by modeling in the Vivado Design Suite computer-aided design for the implementation of the multiplication device on the development/evaluation kit Artix-7 based on the Spartan 6 field-programmable gate array series by Xilinx. The effectiveness of the proposed hardware pipeline multiplier in modulo is confirmed by the Verilog Testbench timing diagram implemented for the evaluation kit Artix-7 field-programmable gate array. In addition, the developed pipelined modulo multiplier takes no more than 0.02 % of the resources of the used field-programmable gate array for a given length of input data. Compared to the matrix multiplication method, a pipelined modulo multiplier can handle a large data stream without waiting for the result of the previous multiplication step. The modulo pipelined multiplier depth depends on the bit width of the input data. The developed pipeline device can be used in digital computing devices operating in a polynomial system of residue classes, as well as for high-speed data encryption in blocks of cipher processors operating on the basis of a non-positional polynomial number system.
In this study, a new spiral dual-band antenna integrated with an optical system for a small CubeSat spacecraft was proposed. It is challenging to design an antenna with a limited space on a CubeSat platform. To improve the space utilization, an antenna was designed based on the concept of not occupying the sides of the CubeSat. A feature of the proposed antenna system is its compactness, dual-band operation in the L-and S-bands, and possibility of integration with spacecraft cameras. As a result of the study, reflection coefficients of -18 dB and -23 dB and gain of 6.8 dBi and 7.4 dBi, respectively, were achieved at resonant frequencies of 1.7 GHz and 2.45 GHz. The conical shape of the spiral antenna allows the optical system to increase the coverage area, and a simple deployment system with feedback ensures the mission safety. These properties make the proposed antenna suitable for CubeSat systems.INDEX TERMS CubeSat antenna, dual-band antenna, Earth observation, helix antenna
In this work, we discuss deployment of a new setup of high-frequency antennas for detection of air showers. It is considered to employ two types of high-frequency antennas for the new setup, the first type of antenna is the SALLA type, which is used in the Tunka-Rex experiment, and the second type is a narrow-radiational high-frequency Uda-Yagi antenna. The comparison of radiation patterns, frequency range and noise level in the mountains and at the university altitude levels is presented.
Among public-key cryptosystems, cryptosystems built on the basis of a polynomial system of residual classes are special. Because in these systems, arithmetic operations are performed at high speed. There are many algorithms for encrypting and decrypting data presented in the form of polynomials. The paper considers data encryption based on the multiplication of polynomials modulo irreducible polynomials. In such a multiplier, the binary image of a multiply polynomial can serve as a fragment of encrypted text. The binary image of the multiplier polynomial is the secret key and the binary representation of the irreducible polynomial is the module.
Existing sequential polynomial multipliers and single-cycle matrix polynomial multipliers modulo do not provide the speed required by the encryption block. The paper considers the possibility of multiplying polynomials modulo on a Pipeline in which architectural techniques are laid in order to increase computing performance.
In the conclusion of the work, the time gain of the multiplication modulo is shown by the example of the multiplication of five triples of polynomials. Verilog language was used to describe the scheme of the Pipeline multiplier. Used FPGA Artix-7 from Xilinx companies.
The developed Pipeline multiplier can be used for cryptosystems based on a polynomial system of residual classes, which can be implemented in hardware or software.
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